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ADRF5130-EVALZ

P1-P3P4-P6P7-P9P10-P11
Data Sheet ADRF5130
Rev. A | Page 3 of 10
SPECIFICATIONS
V
DD
= 5 V, V
CTL
= 0 V or V
DD
, T
A
= 25°C, 50 Ω system, unless otherwise noted.
Table 1.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
FREQUENCY RANGE 0.7 3.5 GHz
INSERTION LOSS 0.7 GHz to 2.0 GHz 0.6 dB
2.0 GHz to 3.5 GHz 0.7 dB
ISOLATION
RFC to RF1 or RF2 (Worst Case) 0.7 GHz to 2.0 GHz 50 dB
2.0 GHz to 3.5 GHz 46 dB
RF1 to RF2 (Worst Case) 0.7 GHz to 2.0 GHz 51 dB
2.0 GHz to 3.5 GHz
41
dB
RETURN LOSS
RFC 0.7 GHz to 2.0 GHz 23 dB
2.0 GHz to 3.5GHz 17 dB
RFC to RF1 or RF2 0.7 GHz to 2.0 GHz 21 dB
2.0 GHz to 3.5 GHz 17 dB
SWITCHING SPEED
Time
Rise and Fall t
RISE
, t
FALL
90% to 10% of RF output 155 ns
On and Off t
ON
, t
OFF
50% V
CTL
to 10% to 90% of RF output 750 ns
RADIO FREQUENCY (RF) SETTLING TIME 50% V
CTL
to 0.1 dB margin of final RF output 1.8 µs
INPUT POWER
0.1 dB Compression P0.1dB 46 dBm
INPUT THIRD-ORDER INTERCEPT IP3 Two-tone input power = 25 dBm/tone
0.7 GHz to 2 GHz
68
dBm
2 GHz to 3.5 GHz 65 dBm
RECOMMENDED OPERATING CONDITIONS 0.7 GHz to 3.5 GHz
Voltage Range
Bias V
DD
4.5 5.4 V
Control V
CTL
0 V
DD
V
Maximum RF Input Power
T
CASE
= 105°C Continuous wave 41 dBm
T
CASE
= 85°C
Continuous wave
43
dBm
8 dB peak to average ratio (PAR) LTE, average 38 dBm
8 dB PAR LTE, single event (<10 sec), average 44 dBm
T
CASE
= 25°C Continuous wave 44.5 dBm
Case Temperature Range T
CASE
−40 +105 °C
DIGITAL INPUT CONTROL VOLTAGE V
DD
= 4.5 V to 5.4 V, T
CASE
= −40°C to +105°C at <1 µA typical
Low Range V
IL
0 0.8 V
High Range V
IH
1.3 5.0 V
SUPPLY CURRENT I
DD
V
DD
= 5 V 1.06 mA
ADRF5130 Data Sheet
Rev. A | Page 4 of 10
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Bias Voltage Range (V
DD
) −0.3 V to +5.5 V
Control Voltage Range (V
CTL
)
−0.3 V to +5.5 V
RF Input Power,
1
Continuous Wave
46.5 dBm
Channel Temperature 135°C
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +105°C
Peak Reflow Temperature (MSL3)
2
260°C
Thermal Resistance (Channel to Package
Bottom)
17°C/W
Electrostatic Discharge (ESD) Sensitivity
HBM 2 kV (Class 2)
CDM 1.25 kV
1
For the recommended operating conditions, see Table 1.
2
See the Ordering Guide section.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Data Sheet ADRF5130
Rev. A | Page 5 of 10
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
13
1
3
4
2
7
GND
GND
RF1
GND
5
6
GND
GND
GND
14
GND
15
GND
16
RF2
17
GND
18
GND
GND
8
GND
9
GND
10
RFC
11
GND
12
19
GND
GND
20
GND
21
V
CTL
22
V
DD
23
GND
24
GND
ADRF5130
TOP VIEW
(Not to Scale)
NOTES
1. EXPOSED PAD. EXPOSED PAD MUST BE
CONNECTED TO RF/DC GROUND.
14081-002
PACKAGE
BASE
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1, 2, 4 to 9, 11 to 15, 17 to 20, 23, 24 GND Ground. The package bottom has an exposed metal pad that must connect to the
printed circuit board (PCB) RF/dc ground. See Figure 3 for the GND interface schematic.
3 RF1 RF Output Port 1. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor
is required on this pin.
10 RFC RF Input Common Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking
capacitor is required on this pin.
16 RF2 RF Output Port 2. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor
is required on this pin.
21 V
CTL
Control Input. See Figure 4 for the V
CTL
interface schematic. Refer to Table 4 and the
recommended digital input control voltage range in Table 1.
22 V
DD
Supply Voltage. See Figure 4 for the V
DD
interface schematic.
EPAD Exposed Pad. Exposed pad must be connected to RF/dc ground.
Table 4. Truth Table
Signal Path State
Control Input (V
CTL
) State
RFC to RF1
RFC to RF2
Low Off On
High On Off
INTERFACE SCHEMATICS
GND
14081-003
Figure 3. GND Interface Schematic
V
DD
V
CTL
14081-004
Figure 4. Control Interface Schematic
P1-P3P4-P6P7-P9P10-P11

ADRF5130-EVALZ

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Buy ADRF5130-EVALZ
Manufacturer:
Analog Devices Inc.
Description:
RF Development Tools Eval Board
Lifecycle:
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