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LTC3728LEGN-1#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32
LTC3728L-1
13
3728l1fc
Figure 1 on the fi rst page is a basic LTC3728L-1 applica-
tion circuit. External component selection is driven by
the load requirement, and begins with the selection of
R
SENSE
and the inductor value. Next, the power MOSFETs
and D1 are selected. Finally, C
IN
and C
OUT
are selected.
The circuit shown in Figure 1 can be confi gured for
operation up to an input voltage of 28V (limited by the
external MOSFETs).
R
SENSE
Selection For Output Current
R
SENSE
is chosen based on the required output current.
The current comparator has a maximum threshold of
75mV/R
SENSE
and an input common mode range of SGND
to 1.1(INTV
CC
). The current comparator threshold sets the
peak of the inductor current, yielding a maximum average
output current I
MAX
equal to the peak value less half the
peak-to-peak ripple current, ∆I
L
.
Allowing a margin for variations in the IC and external
component values yields:
R
SENSE
=
50mV
I
MAX
When using the controller in very low dropout conditions,
the maximum output current level will be reduced due to
the internal compensation required to meet stability criteria
for buck regulators operating at greater than 50% duty
factor. A curve is provided to estimate this reduction in
peak output current level depending upon the operating
duty factor.
Operating Frequency
The IC uses a constant frequency phase-lockable ar-
chitecture with the frequency determined by an internal
capacitor. This capacitor is charged by a fi xed current plus
an additional current which is proportional to the voltage
applied to the PLLFLTR pin. Refer to Phase-Locked Loop
and Frequency Synchronization in the Applications Infor-
mation section for additional information.
A graph for the voltage applied to the PLLFLTR pin vs
frequency is given in Figure 5. As the operating frequency
is increased the gate charge losses will be higher, reducing
APPLICATIONS INFORMATION
Figure 5. PLLFLTR Pin Voltage vs Frequency
effi ciency (see Effi ciency Considerations). The maximum
switching frequency is approximately 550kHz.
Inductor Value Calculation
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is effi ciency. A higher
frequency generally results in lower effi ciency because
of MOSFET gate charge losses. In addition to this basic
trade-off, the effect of inductor value on ripple current and
low current operation must also be considered.
The inductor value has a direct effect on ripple current.
The inductor ripple current ∆I
L
decreases with higher
inductance or frequency and increases with higher V
IN
:
I
L
=
1
(f)(L)
V
OUT
1–
V
OUT
V
IN
Accepting larger values of ∆I
L
allows the use of low in-
ductances, but results in higher output voltage ripple and
greater core losses. A reasonable starting point for setting
ripple current is ∆I
L
=0.3(I
MAX
). The maximum ∆I
L
occurs
at the maximum input voltage.
The inductor value also has secondary effects. The tran-
sition to Burst Mode operation begins when the average
inductor current required results in a peak current below
OPERATING FREQUENCY (kHz)
200 300 400 500 600
PLLFLTR PIN VOLTAGE (V)
3728L1 F05
2.5
2.0
1.5
1.0
0.5
0
LTC3728L-1
14
3728l1fc
APPLICATIONS INFORMATION
25% of the current limit determined by R
SENSE
. Lower
inductor values (higher ∆I
L
) will cause this to occur at
lower load currents, which can cause a dip in effi ciency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease.
Inductor Core Selection
Usually, high inductance is preferred for small current
ripple and low core loss. Unfortunately, increased induc-
tance requires more turns of wire or a smaller air gap in
the inductor core, resulting in high copper loss or low
saturation current. Once the value of L is known, the actual
inductor must be selected. There are two popular types
of core material of commercial available inductors. Ferrite
core inductors usually have very low core loss and are
preferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing satura-
tion. However, ferrite core saturates “hard”, which means
that inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage
ripple. One advantage of the LTC3728L-1 is its current
mode control that detects and limits cycle-by-cycle peak
inductor current. Therefore, accurate and fast protection
is achieved if the inductor is saturated in steady state or
during transient mode.
Powdered iron core inductors usually saturate “soft”, which
means the inductance drops in a linear fashion when the
current increases. However, the core loss of the powder
iron inductor is usually higher than the ferrite inductor.
So designs with high switching frequency should also
address inductor core loss.
Inductor manufacturers usually provide inductance, DCR,
(peak) saturation current and (DC) heating current ratings
in the inductor data sheet. A good supply design should
not exceed the saturation and heating current rating of
the inductor.
Power MOSFET and D1 Selection
Two external power MOSFETs must be selected for each
controller in the LTC3728L-1: One N-channel MOSFET for
the top (main) switch, and one N-channel MOSFET for the
bottom (synchronous) switch.
The peak-to-peak drive levels are set by the INTV
CC
voltage. This voltage is typically 5V during start-up
(see EXTV
CC
Pin Connection). Consequently, logic-level
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected (V
IN
< 5V); then, sub-logic level threshold MOSFETs (V
GS(TH)
< 3V) should be used. Pay close attention to the BV
DSS
specifi cation for the MOSFETs as well; most of the logic
level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R
DS(ON)
, Miller capacitance C
MILLER
, input
voltage and maximum output current. Miller capacitance,
C
MILLER
, can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data
sheet. C
MILLER
is equal to the increase in gate charge
along the horizontal axis while the curve is approximately
fl at divided by the specifi ed change in V
DS
. This result is
then multiplied by the ratio of the application applied V
DS
to the Gate charge curve specifi ed V
DS
. When the IC is
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
Main Switch Duty Cycle =
V
OUT
V
IN
Synchronous Switch Duty Cycle =
V
IN
–V
OUT
V
IN
The MOSFET power dissipations at maximum output
current are given by:
P
MAIN
=
V
OUT
V
IN
I
MAX
()
2
1+
()
R
DS(ON)
+
V
IN
()
2
I
MAX
2
R
DR
()
C
MILLER
()
•
1
V
INTVCC
–V
THMIN
+
1
V
THMIN
f
()
P
SYNC
=
V
IN
–V
OUT
V
IN
I
MAX
()
2
1+
()
R
DS(ON)
LTC3728L-1
15
3728l1fc
APPLICATIONS INFORMATION
where δ is the temperature dependency of R
DS(ON)
and
R
DR
(approximately 4) is the effective driver resistance
at the MOSFET’s Miller threshold voltage. V
THMIN
is the
typical MOSFET minimum threshold voltage.
Both MOSFETs have I
2
R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
IN
< 20V
the high current effi ciency generally improves with larger
MOSFETs, while for V
IN
> 20V the transition losses rapidly
increase to the point that the use of a higher R
DS(ON)
device
with lower C
MILLER
actually provides higher effi ciency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1+δ) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs Temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The Schottky diode D1 shown in Figure 1 conducts dur-
ing the dead-time between the conduction of the two
power MOSFETs. This prevents the body diode of the
bottom MOSFET from turning on, storing charge during
the dead-time and requiring a reverse recovery period
that could cost as much as 3% in effi ciency at high V
IN
.
A 1A to 3A Schottky is generally a good compromise for
both regions of operation due to the relatively small aver-
age current. Larger diodes result in additional transition
losses due to their larger junction capacitance. Schottky
diodes should be placed in parallel with the synchronous
MOSFETs when operating in pulse-skip mode or in Burst
Mode operation.
C
IN
and C
OUT
Selection
The selection of C
IN
is simplifi ed by the multiphase ar-
chitecture and its impact on the worst-case RMS current
drawn through the input network (battery/fuse/capacitor).
It can be shown that the worst case RMS current occurs
when only one controller is operating. The controller with
the highest (V
OUT
)(I
OUT
) product needs to be used in the
formula below to determine the maximum RMS current
requirement. Increasing the output current, drawn from
the other out-of-phase controller, will actually decrease the
input RMS ripple current from this maximum value (see
Figure 4). The out-of-phase technique typically reduces
the input capacitor’s RMS ripple current by a factor of
30% to 70% when compared to a single phase power
supply solution.
The type of input capacitor, value and ESR rating have
effi ciency effects that need to be considered in the selec-
tion process. The capacitance value chosen should be
suffi cient to store adequate charge to keep high peak
battery currents down. 20µF to 40µF is usually suffi cient
for a 25W output supply operating at 200kHz. The ESR of
the capacitor is important for capacitor power dissipation
as well as overall battery effi ciency. All of the power (RMS
ripple current • ESR) not only heats up the capacitor but
wastes power from the battery.
Medium voltage (20V to 35V) ceramic, tantalum, OS-CON
and switcher-rated electrolytic capacitors can be used
as input capacitors, but each has drawbacks: ceramics
have very high voltage coeffi cients and may have audible
piezoelectric effects; tantalums need to be surge-rated;
OS-CONs suffer from higher inductance, larger case size
and limited surface-mount applicability; electrolytics’
higher ESR and dryout possibility require several to be
used. Multiphase systems allow the lowest amount of
capacitance overall. As little as one 22µF or two to three
10µF ceramic capacitors are an ideal choice in a 20W to
35W power supply due to their extremely low ESR. Even
though the capacitance at 20V is substantially below their
rating at zero-bias, very low ESR loss makes ceramics
an ideal candidate for highest effi ciency battery operated
systems. Also consider parallel ceramic and high quality
electrolytic capacitors as an effective means of achieving
ESR and bulk capacitance goals.
In continuous mode, the source current of the top N-channel
MOSFET is a square wave of duty cycle V
OUT
/V
IN
. To prevent
large voltage transients, a low ESR input capacitor sized for
the maximum RMS current of one channel must be used.
The maximum RMS capacitor current is given by:
C
IN
RequiredI
RMS
I
MAX
V
OUT
V
IN
V
OUT
()
1/ 2
V
IN
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LTC3728LEGN-1#TRPBF

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Buy LTC3728LEGN-1#TRPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2x, 550kHz, 2-PhSync Reg
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