MAX11644/MAX11645
Low-Power, 1-/2-Channel, I
2
C, 12-Bit ADCs
in Ultra-Tiny 1.9mm x 2.2mm Package
______________________________________________________________________________________ 19
Transfer Functions
Output data coding for the MAX11644/MAX11645 is
binary in unipolar mode and two’s complement in bipo-
lar mode with 1 LSB = (V
REF
/2
N
) where N is the number
of bits (12). Code transitions occur halfway between
successive-integer LSB values. Figures 12 and 13
show the input/output (I/O) transfer functions for unipo-
lar and bipolar operations, respectively.
Layout, Grounding, and Bypassing
Only use PCBs. Wire-wrap configurations are not rec-
ommended since the layout should ensure proper sep-
aration of analog and digital traces. Do not run analog
and digital lines parallel to each other, and do not lay-
out digital signal paths underneath the ADC package.
Use separate analog and digital PCB ground sections
with only one star point (Figure 14) connecting the two
ground systems (analog and digital). For lowest noise
operation, ensure the ground return to the star ground’s
power supply is low impedance and as short as possi-
ble. Route digital signals far away from sensitive analog
and reference inputs.
High-frequency noise in the power supply (V
DD
) could
influence the proper operation of the ADC’s fast compara-
tor. Bypass V
DD
to the star ground with a network of two
parallel capacitors, 0.1μF and 4.7μF, located as close as
possible to the MAX11644/MAX11645 power-supply pin.
Minimize capacitor lead length for best supply noise
rejection, and add an attenuation resistor (5Ω) in series
with the power supply if it is extremely noisy.
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best straight-line fit or a line
drawn between the endpoints of the transfer function,
once offset and gain errors have been nullified. The
MAX11644/MAX11645’s INL is measured using the
endpoint.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1 LSB. A
DNL error specification of less than 1 LSB guarantees
no missing codes and a monotonic transfer function.
Aperture Jitter
Aperture jitter (t
AJ
) is the sample-to-sample variation in
the time between the samples.
Aperture Delay
Aperture delay (t
AD
) is the time between the falling
edge of the sampling clock and the instant when an
actual sample is taken.
MAX11644
MAX11645
OUTPUT CODE
FULL-SCALE
TRANSITION
11 . . . 111
11 . . . 110
11 . . . 101
00 . . . 011
00 . . . 010
00 . . . 001
00 . . . 000
123
0
FS
FS - 3/2 LSB
FS = V
REF
ZS = GND
INPUT VOLTAGE (LSB)
1 LSB =
V
REF
4096
Figure 12. Unipolar Transfer Function
011 . . . 111
011 . . . 110
000 . . . 010
000 . . . 001
000 . . . 000
111 . . . 111
111 . . . 110
111 . . . 101
100 . . . 001
100 . . . 000
- FS
0
INPUT VOLTAGE (LSB)
OUTPUT CODE
ZS = 0
+FS - 1 LSB
FS
=
V
REF
2
-FS =
-V
REF
2
MAX11644
MAX11645
1 LSB =
V
REF
4096
Figure 13. Bipolar Transfer Function
MAX11644/MAX11645
20 ______________________________________________________________________________________
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital
samples, the theoretical maximum SNR is the ratio of
the full-scale analog input (RMS value) to the RMS
quantization error (residual error). The ideal, theoretical
minimum analog-to-digital noise is caused by quantiza-
tion error only and results directly from the ADC’s reso-
lution (N bits):
SNR
MAX[dB]
= 6.02dB x N + 1.76dB
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise, which includes all spectral
components minus the fundamental, the first five har-
monics, and the DC offset.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to the
RMS equivalent of all other ADC output signals.
Effective Number of Bits
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of quanti-
zation noise only. With an input range equal to the
ADC’s full-scale range, calculate the ENOB as follows:
ENOB = (SINAD - 1.76)/6.02
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the input signal’s first five harmonics to the fun-
damental itself. This is expressed as:
where V
1
is the fundamental amplitude, and V
2
through
V
5
are the amplitudes of the 2nd- through 5th-order
harmonics.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of the
RMS amplitude of the fundamental (maximum signal
component) to the RMS value of the next largest distor-
tion component.
THD
VVVV
V
log
+++
20
2
2
3
2
4
2
5
2
1
SINAD dB
Signal
Noise THD
RMS
RMS RMS
() log
+
20
GND
V
LOGIC
= 3V/5V3V OR 5V
SUPPLIES
DGND3V/5VGND
*OPTIONAL
4.7μF
R* = 5Ω
0.1μF
V
DD
DIGITAL
CIRCUITRY
MAX11644
MAX11645
Figure 14. Power-Supply Grounding Connection
Low-Power, 1-/2-Channel, I
2
C, 12-Bit ADCs
in Ultra-Tiny 1.9mm x 2.2mm Package
MAX11644/MAX11645
Low-Power, 1-/2-Channel, I
2
C, 12-Bit ADCs
in Ultra-Tiny 1.9mm x 2.2mm Package
______________________________________________________________________________________ 21
*OPTIONAL
R
S
*
R
S
*
ANALOG
INPUTS
μC
SDA
SCL
GND
V
DD
SDA
SCL
AIN0
AIN1
RC NETWORK*
REF
3.3V or 5V
5V
R
P
C
REF
0.1μF
R
P
5V
MAX11644
MAX11645
0.1μF
2kΩ
Typical Operating Circuit
Chip Information
PROCESS: BiCMOS
PART
INPUT
CHANNELS
INTERNAL
REFERENCE
(V)
SUPPLY
VOLTAGE
(V)
INL
(LSB)
MAX11644
2 single-
ended/1
differential
4.096 4.5 to 5.5 ±1
MAX11645
2 single-
ended/1
differential
2.048 2.7 to 3.6 ±1
Selector Guide
Package Information
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages
. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 μMAX U8CN+1
21-0036 90-0092
12 WLP W121C2+1
21-0009
Refer to
Application
Note 1891

MAX11644EUA+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 12-Bit 2Ch 94.4ksps 5.5V Precision ADC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union