8©2016 Integrated Device Technology, Inc Revision B March 3, 2016
810001-21 Data Sheet
Table 4B. LVCMOS/LVTTL DC Characteristics, V
DD
= V
DDO
= V
DDX
= 3.3V ± 5%, T
A
= 0°C to 70°C
AC Electrical Characteristics
Table 5. AC Characteristics, V
DD
= V
DDO
= V
DDX
= 3.3V ± 5%, T
A
= 0°C to 70°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
See Parameter Measurement Information Section.
NOTE 1: Refer to the Phase Noise Plot.
NOTE 2: Lock Time measured from power-up to stable output frequency.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage 2.0 V
DD
+ 0.3 V
V
IL
Input Low Voltage -0.3 0.8 V
I
IH
Input
High Current
CLK[0:1], CLK_SEL,
P[1:0], V[3:0], N[1:0],
MR, MF, XTAL_SEL
V
DD
= V
IN
= 3.465V 150 µA
OE, nBP0, nBP1 V
DD
= V
IN
= 3.465V 5 µA
I
IL
Input
Low Current
CLK[0:1], CLK_SEL,
P[1:0], V[3:0], N[1:0],
MR, MF, XTAL_SEL
V
DD
= 3.465V, V
IN
= 0V -5 µA
OE, nBP0, nBP1 V
DD
= 3.465, V
IN
= 0V -150 µA
V
OH
Output High Voltage I
OH
= -24mA 2.6 V
V
OL
Output Low Voltage I
OL
= 24mA 0.5 V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency
nBP0, nBP1 = 00 14 35 MHz
nBP1 = 1 31 175 MHz
tjit(Ø)
RMS Phase Jitter, (Random),
NOTE 1
148.3516MHz,
Integration Range: 12kHz – 20MHz
1.089 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 250 750 ps
odc Output Duty Cycle 48 52 %
t
LOCK
VCXO & FemtoClock PLL
Lock Time; NOTE 2
M = 92, Bandwidth = 475Hz 100 ms
M = 4004, Bandwidth = 6Hz 25 s
