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Table 1. VID Output Voltage Programming
VID4 VID3 VID2 VID1 VID0 V
OUT
(V)
000002.000V
000011.950V
000101.900V
000111.850V
001001.800V
001011.750V
001101.700V
001111.650V
010001.600V
010011.550V
010101.500V
010111.450V
011001.400V
011011.350V
011101.300V
01111 *
100001.275V
100011.250V
100101.225V
100111.200V
101001.175V
101011.150V
101101.125V
101111.100V
110001.075V
110011.050V
110101.025V
110111.000V
111000.975V
111010.950V
111100.925V
11111 **
Note: *, ** represents codes without a defined output voltage as specified in
Intel specifications. The LTC1736 interprets these codes as valid inputs and
produces output voltages as follows: [01111] = 1.250V, [11111] = 0.900V.
Topside MOSFET Driver Supply (C
B
, D
B
)
An external bootstrap capacitor C
B
connected to the BOOST
pin supplies the gate drive voltage for the topside MOSFET.
Capacitor C
B
in the Functional Diagram is charged though
external diode D
B
from INTV
CC
when the SW pin is low.
Note that the voltage across C
B
is about a diode drop below
INTV
CC
. When the topside MOSFET is to be turned on, the
driver places the C
B
voltage across the gate-source of the
MOSFET. This enhances the MOSFET and turns on the
topside switch. The switch node voltage SW rises to V
IN
and the BOOST pin rises to V
IN
+ INTV
CC
. The value of the
boost capacitor C
B
needs to be 100 times greater than the
total input capacitance of the topside MOSFET. In most
applications 0.1µF to 0.33µF is adequate. The reverse
breakdown on D
B
must be greater than V
IN(MAX) .
When adjusting the gate drive level, the final arbiter is the
total input current for the regulator. If you make a change
and the input current decreases, then you improve the
efficiency. If there is no change in input current, then there
is no change in efficiency.
SENSE
+
/SENSE
Pins
The common mode input range of the current comparator
is from 0V to 1.1(INTV
CC
). Continuous linear operation is
guaranteed throughout this range allowing output volt-
ages anywhere from 0.8V to 7V (although the VID control
pins only program a 0.925V to 2.00V output range). A
differential NPN input stage is used and is biased with
internal resistors from an internal 2.4V source as shown
in the Functional Diagram. This causes current to flow out
of both sense pins to the main output. This forces a
minimum load current which is sunk by the internal
resistive divider resistors R1 and R2. The maximum
current flowing out of the sense pins is:
I
SENSE
+
+ I
SENSE
= (2.4V – V
OUT
)/24k
Remember to take this current into account if resistance is
placed in series with the sense pins for filtering.
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LTC1736
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Soft-Start/Run Function
The RUN/SS pin is a multipurpose pin that provides a soft-
start function and a means to shut down the LTC1736.
Soft-start reduces surge currents from V
IN
by gradually
increasing the controller’s current limit I
TH(MAX)
. This pin
can also be used for power supply sequencing.
Pulling the RUN/SS pin below 1.5V puts the LTC1736 into
a low quiescent current shutdown (I
Q
< 25µA). This pin can
be driven directly from logic as shown in Figure 3. Releas-
ing the RUN/SS pin allows an internal 1.2µA current
source to charge up the external soft-start capacitor C
SS.
If RUN/SS has been pulled all the way to ground there is
a delay before starting of approximately:
t
V
A
CsFC
DELAY SS SS
=
µ
()
15
12
125
.
.
./
When the voltage on RUN/SS reaches 1.5V the LTC1736
begins operating with a current limit at approximately
25mV/R
SENSE
. As the voltage on RUN/SS increases from
1.5V to 3.0V, the internal current limit is increased from
25mV/R
SENSE
to 75mV/R
SENSE
. The output current limit
ramps up slowly, taking an additional 1.25s/µF to reach
full current. The output current thus ramps up slowly
reducing the starting surge current required from the input
power supply.
Diode D1 in Figure 3 reduces the start delay while allowing
C
SS
to charge up slowly for the soft-start function. This
diode and C
SS
can be deleted if soft-start is not needed.
The RUN/SS pin has an internal 6V zener clamp (See
Functional Diagram).
Fault Conditions: Overcurrent Latchoff
The RUN/SS pin also provides the ability to shut off the
controller and latchoff when an overcurrent condition is
detected. The RUN/SS capacitor C
SS
is used initially to
turn on and limit the inrush current of the controller. After
the controller has been started and given adequate time to
charge up the output capacitor and provide full load
current, C
SS
is used as a short-circuit timer. If the output
voltage falls to less than 70% of its nominal output voltage
after C
SS
reaches 4.1V
, the assumption is made that the
output is in a severe overcurrent and/or short-circuit
condition and C
SS
begins discharging. If the condition
lasts for a long enough period as determined by the size of
C
SS
, the controller will be shut down until the RUN/SS pin
voltage is recycled.
This built-in latchoff can be overridden by providing a
current >5µA at a compliance of 5V to the RUN/SS pin as
shown in Figure 4. This current shortens the soft-start
period but also prevents net discharge of the RUN/SS
capacitor during a severe overcurrent and/or short-circuit
condition. When deriving the 5µA current from V
IN
as in
Figure 4a, current latchoff is always defeated. A diode
connecting this pull-up resistor to INTV
CC
, as in Figure 4b,
eliminates any extra supply current during controller shut-
down while eliminating the INTV
CC
loading from prevent-
ing controller start-up. If the voltage on C
SS
does not exceed
4.1V, the overcurrent latch is not armed and the function
is disabled.
Figure 3. RUN/SS Pin Interfacing
3.3V OR 5V RUN/SS
D1
RUN/SS
(a) (b)
C
SS
C
SS
1736 F03
3.3V OR 5V RUN/SS
V
IN
INTV
CC
RUN/SS
D1
(a) (b)
D1
C
SS
R
SS
C
SS
R
SS
1736 F04
Figure 4. RUN/SS Pin Interfacing with Latchoff Defeated
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Why should you defeat overcurrent latchoff? During the
prototyping stage of a design, there may be a problem with
noise pickup or poor layout causing the protection circuit
to latch off. Defeating this feature will easily allow trouble-
shooting of the circuit and PC layout. The internal short-
circuit and foldback current limiting still remains active,
thereby protecting the power supply system from failure.
After the design is complete, a decision can be made
whether to enable the latchoff feature.
The value of the soft-start capacitor C
SS
will need to be
scaled with output voltage, output capacitance and load
current characteristics. The minimum soft-start capaci-
tance is given by:
C
SS
> (C
OUT
)(V
OUT
)(10
–4
)(R
SENSE
)
The minimum recommended soft-start capacitor of C
SS
=
0.1µF will be sufficient for most applications.
Fault Conditions: Current Limit and Current Foldback
The LTC1736 current comparator has a maximum sense
voltage of 75mV resulting in a maximum MOSFET current
of 75mV/R
SENSE
.
The LTC1736 includes current foldback to help further
limit load current when the output is shorted to ground.
The foldback circuit is active even when the overload
shutdown latch described above is defeated. If the output
falls by more than half, then the maximum sense voltage
is progressively lowered from 75mV to 30mV. Under
short-circuit conditions with very low duty cycle, the
LTC1736 will begin cycle skipping in order to limit the
short-circuit current. In this situation the bottom MOSFET
will be conducting the peak current. The short-circuit
ripple current is determined by the minimum on-time
t
ON(MIN)
of the LTC1736 (less than 200ns), the input
voltage, and inductor value:
I
L(SC)
= t
ON(MIN)
V
IN
/L.
The resulting short circuit current is:
I
mV
R
I
SC
SENSE
LSC
=+
30 1
2
()
The current foldback function is always active and is not
effected by the current latchoff function.
Fault Conditions: Output Overvoltage Protection
(Crowbar)
The output overvoltage crowbar is designed to blow a
system fuse in the input lead when the output of the
regulator rises much higher than nominal levels. This
condition causes huge currents to flow, much greater than
in normal operation. This feature is designed to protect
against a shorted top MOSFET; it does not protect against
a failure of the controller itself.
The comparator (OV in the Functional Diagram) detects
overvoltage faults greater than 7.5% above the nominal
output voltage. When this condition is sensed, the top
MOSFET is turned off and the bottom MOSFET is forced
on. The bottom MOSFET remains on continuously for as
long as the OV condition persists; if V
OUT
returns to a safe
level, normal operation automatically resumes. Note that
VID controlled output voltage decreases may cause the
overvoltage protection to be momentarily activated. This
will not cause permanent latchoff nor will it disrupt the
desired voltage change.
With soft-latch overvoltage protection, dynamic VID code
changes are allowed and the overvoltage protection tracks
the new VID code, always protecting the load (CPU). If
dynamic VID code changes are anticipated and the mini-
mum load current is light, it may be necessary to either
force continuous operation by pulling FCB low during the
transition to maximize current sinking capability or con-
nect PGOOD to FCB to automatically force continuous
operation during VID transitions.

LTC1736IG#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 5-B Adj Hi Eff Sync Buck Sw Reg
Lifecycle:
New from this manufacturer.
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