PCF2003 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 1 — 20 October 2015 13 of 30
NXP Semiconductors
PCF2003
32 kHz watch circuit with programmable adaptive motor pulse
V
DD(nom)
: nominal supply voltage.
(1)
Fig 8. Supply voltage modulation and corresponding supply current variation for
reading word B
9
''QRP
9
''
9
3PRG

9
66
W
PJZ
,
''
W
W
W
W
W
W
W
W
W
9
3SURJVWDUW
W
SVWDUW
9
3SURJVWRS
W
SVWRS
I
DD
V
DD
30 k
---------------
=
PCF2003 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 1 — 20 October 2015 14 of 30
NXP Semiconductors
PCF2003
32 kHz watch circuit with programmable adaptive motor pulse
7.9 Frequency tuning of assembled watch
Figure 9 shows the test set-up for frequency tuning the assembled watch.
7.10 Measurement of oscillator frequency and inhibition time
The output of the two measuring states can either be monitored directly at pad RESET or
as a modulation of the supply voltage (a modulating resistor of 30 k is connected
between V
DD
and V
SS
when the signal at pad RESET is at HIGH-level).
The supply voltage modulation must be followed as shown in Figure 10
in order to
guarantee the correct start-up of the circuit during production and testing.
Measuring states:
Fig 9. Frequency tuning the assembled watch
DDD
)5(48(1&<
&2817(5
352*5$00$%/(
'&32:(56833/<
3&,17(5)$&(
3&
0
PRWRU
N+]
3&)[
EDWWHU\
V
DD(nom)
: nominal supply voltage.
Fig 10. Supply voltage at start-up during production and testing
9
''
9
3SURJVWRS
W
GVWDUW
!PV
9
66
9
''QRP
DDF
W
SVWRS
PCF2003 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 1 — 20 October 2015 15 of 30
NXP Semiconductors
PCF2003
32 kHz watch circuit with programmable adaptive motor pulse
State 1: quartz crystal oscillator frequency divided by 1024; state 1 starts with a pulse
to V
P
and ends with a second pulse to V
P
State 2: inhibition time has a value of n 0.122 ms. A signal with periodicity of
31.25 ms + n 0.122 ms appears at pad RESET and as current modulation at
pad V
DD
(see Figure 11 and Figure 12)
7.11 Customer testing
Connecting pad RESET to V
SS
activates the test mode. In this test mode, the motor
output frequency is 8 Hz; the duty cycle reduction and battery check occurs every second,
instead of every 4 minutes.
8. Safety notes
Fig 11. Output waveform at pad RESET for instruction state 2
V
DD(nom)
: nominal supply voltage.
Fig 12. Supply voltage modulation for starting and stopping of instruction state 2
PJZ
9
''
9
66
PVLQKLELWLRQWLPH
9
2GLI
9
''
9
3SURJVWDUW
9
3PRG
9
3SURJVWRS
W
W
SVWDUW
W
9
66
9
''QRP
PJX
W
SVWRS
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or
equivalent standards.
CAUTION
Semiconductors are light sensitive. Exposure to light sources can cause the IC to
malfunction. The IC must be protected against light. The protection must be applied to all
sides of the IC.

PCF2003DUS/DAAZ

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC CLOCK 32KHZ 1CIR 8WLCSP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet