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X28HC256PIZ-90

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
1
DATASHEET
256k, 32k x 8-Bit, 5V, Byte Alterable EEPROM
X28HC256
The X28HC256 is a second generation high performance
CMOS 32k x 8 EEPROM. It is fabricated with Intersil’s
proprietary, textured poly floating gate technology, providing a
highly reliable 5V only nonvolatile memory.
The X28HC256 supports a 128-byte page write operation,
effectively providing a 24µs/byte write cycle, and enabling the
entire memory to be typically rewritten in less than 0.8s. The
X28HC256 also features DATA
polling and Toggle bit polling,
two methods of providing early end of write detection. The
X28HC256 also supports the JEDEC standard software data
protection feature for protecting against inadvertent writes
during power-up and power-down.
Endurance for the X28HC256 is specified as a minimum
100,000 write cycles per byte and an inherent data retention
of 100 years.
Features
• Access time: 90ns
• Simple byte and page write
-Single 5V supply
-No external high voltages or V
P-P
control circuits
-Self timed
- No erase before write
- No complex programming algorithms
- No overerase problem
•Low power CMOS
- Active: 60mA
- Standby: 500µA
• Software data protection
- Protects data against system level inadvertent writes
• High speed page write capability
• Highly reliable Direct Write
™
cell
- Endurance: 100,000 cycles
- Data retention: 100 years
• Early end of write detection
-DATA
polling
- Toggle bit polling
• RoHS compliant
X BUFFERS
LATCHES AND
DECODER
I/O BUFFERS
AND LATCHES
Y BUFFERS
LATCHES AND
DECODER
CONTROL
LOGIC AND
TIMING
256k BIT
EEPROM
ARRAY
I/O
0
TO I/O
7
DATA INPUTS/OUTPUTS
CE
OE
V
CC
V
SS
A
0
TO A
14
WE
ADDRESS
INPUTS
FIGURE 1. BLOCK DIAGRAM
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Copyright Intersil Americas LLC 2005-2007, 2010, 2011, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
August 27, 2015
FN8108.5
X28HC256
2
FN8108.5
August 27, 2015
Submit Document Feedback
Ordering Information
PART NUMBER
(Note 4
)PART MARKING
ACCESS TIME
(ns)
TEMP. RANGE
(°C) PACKAGE PKG. DWG. #
X28HC256JZ-15 (Notes 1
, 3) X28HC256J-15 ZHY 150 0 to +70 32 Ld PLCC (RoHS Compliant) N32.45x55
X28HC256JI-15 (Note 1
) X28HC256JI-15 HY 150 -40 to +85 32 Ld PLCC N32.45x55
X28HC256JIZ-15
(Notes 1
, 3)
X28HC256JI-15 ZHY 150 -40 to +85 32 Ld PLCC (RoHS Compliant) N32.45x55
X28HC256PZ-15
(Notes 2
, 3)
X28HC256P-15 HYZ 150 0 to +70 28 Ld PDIP (RoHS Compliant) E28.6
X28HC256PIZ-15
(Notes 2
, 3)
X28HC256PI-15 HYZ 150 -40 to +85 28 Ld PDIP (RoHS Compliant) E28.6
X28HC256JZ-12 (Notes 1
, 3) X28HC256J-12 ZHY 120 0 to +70 32 Ld PLCC (RoHS Compliant) N32.45x55
X28HC256JI-12 (Note 1
) X28HC256JI-12 HY 120 -40 to +85 32 Ld PLCC N32.45x55
X28HC256JIZ-12
(Notes 1
, 3)
X28HC256JI-12 ZHY 120 -40 to +85 32 Ld PLCC (RoHS Compliant) N32.45x55
X28HC256PZ-12
(Notes 2
, 3)
X28HC256P-12 HYZ 120 0 to +70 28 Ld PDIP (RoHS Compliant) E28.6
X28HC256PIZ-12
(Notes 2
, 3)
X28HC256PI-12 HYZ 120 -40 to +85 28 Ld PDIP (RoHS Compliant) E28.6
X28HC256SZ-12 (Note 3
) X28HC256S-12 HYZ 120 0 to +70 28 Ld SOIC (300mils RoHS Compliant) MDP0027
X28HC256SI-12 X28HC256SI-12 HY 120 -40 to +85 28 Ld SOIC (300mils) M28.3
X28HC256SIZ-12 (Note 3
) X28HC256SI-12 HYZ 120 -40 to +85 28 Ld SOIC (300mils RoHS Compliant) MDP0027
X28HC256JZ-90 (Notes 1, 3
) X28HC256J-90 ZHY 90 0 to +70 32 Ld PLCC (RoHS Compliant) N32.45x55
X28HC256JI-90 (Note 1
) X28HC256JI-90 HY 90 -40 to +85 32 Ld PLCC N32.45x55
X28HC256JIZ-90
(Notes 1, 3
)
X28HC256JI-90 ZHY 90 -40 to +85 32 Ld PLCC (RoHS Compliant) N32.45x55
X28HC256PZ-90
(Notes 2
, 3)
X28HC256P-90 HYZ 90 0 to +70 28 Ld PDIP (RoHS Compliant) E28.6
X28HC256PIZ-90 (Notes 2
, 3) X28HC256PI-90 HYZ 90 -40 to +85 28 Ld PDIP (RoHS Compliant) E28.6
X28HC256SI-90 X28HC256SI-90 HY 90 -40 to +85 28 Ld SOIC (300mils) M28.3
X28HC256SIZ-90 (Note 3
) X28HC256SI-90 HYZ 90 -40 to +85 28 Ld SOIC (300mils RoHS Compliant) MDP0027
NOTES:
1. Add “T*” suffix for tape and reel. Please refer to TB347
for details on reel specifications.
2. Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin
plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
4. For Moisture Sensitivity Level (MSL), please see product information page for X28HC256
. For more information on MSL, please see tech brief TB363.
X28HC256
3
FN8108.5
August 27, 2015
Submit Document Feedback
Pin Configurations
X28HC256
(28 LD FLATPACK, PDIP, SOIC)
TOP VIEW
X28HC256
(32 LD PLCC, LCC)
TOP VIEW
A
14
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
I/O
0
I/O
1
I/O
2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE
A
13
A
8
A
9
A
11
OE
A
10
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
A
1
NC
4 3 2 1 32 31 30
14 15 16 17 18 19 20
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
I/O
2
I/O
3
A
8
A
9
A
11
OE
A
10
OE
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
1
NC
V
SS
NC
I/O
0
A
0
A
2
A
3
A
4
A
5
A
6
A
13
WE
V
CC
NC
A
14
A
12
A
7
Pin Descriptions
PIN NAME
PIN #
PDIP, SOIC
PIN #
PLCC, LCC DESCRIPTION
A
0
, A
1
, A
2
, A
3
, A
4
, A
5
,
A
6
, A
7
, A
8
, A
9
, A
10
, A
11
,
A
12
, A
13
, A
14
10, 9, 8, 7, 6, 5,
4, 3, 25, 24, 21, 23,
2, 26, 1
11, 10, 9, 8, 7, 6,
5, 4, 29, 28, 24, 27,
3, 30, 2
Addresses (A
0
to A
14
) - Address inputs. The address inputs select
an 8-bit memory location during a read or write operation.
I/O
0
, I/O
1
, I/O
2
, I/O
3
,
I/O
4
, I/O
5
, I/O
6
, I/O
7
11, 12, 13, 15
16, 17, 18, 19
13, 14, 15, 18
19, 20, 21, 22
Data In/Data Out (I/O
0
to I/O
7
) - Data input/output- Data is
written to or read from the X28HC256 through the I/O pins.
WE
27 31 Write Enable (WE) - The Write enable input controls the writing of
data to the X28HC256.
CE
20 23 Chip Enable (CE) - The Chip enable input must be LOW to enable
all read/write operations. When CE is HIGH, power consumption is
reduced.
OE
22 25 Output Enable (OE) - The output enable input controls the data
output buffers, and is used to initiate read operations.
V
CC
28 32 +5V
V
SS
14 16 Ground
NC - 1, 12, 17, 26 No Connect
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

X28HC256PIZ-90

Mfr. #:
Buy X28HC256PIZ-90
Manufacturer:
Renesas / Intersil
Description:
EEPROM 32K X 8 EEPROM,CMOS,HIGH SPEED,PDIP,I.TEMP,90NS,PB FREE
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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