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R5F212J0SDSP#U0

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P70
R8C/2H Group, R8C/2J Group 5. Electrical Characteristics
Rev.1.00 Mar 28, 2008 Page 41 of 65
REJ03B0217-0100
Table 5.19 Electrical Characteristics (4) [Vcc = 3 V]
(T
opr = −20 to 85°C (N version) / −40 to 85°C (D version), unless otherwise specified.)
Symbol Parameter Condition
Standard
Unit
Min. Typ. Max.
I
CC Power supply current
(V
CC = 2.7 to 3.3 V)
Single-chip mode,
output pins are open,
other pins are V
SS
High-speed
on-chip oscillator mode
High-speed on-chip oscillator on = 8 MHz
Low-speed on-chip oscillator on = 125 kHz
No division
− 5 − mA
High-speed on-chip oscillator on = 8 MHz
Low-speed on-chip oscillator on = 125 kHz
Divide-by-8
− 2 − mA
Low-speed
on-chip oscillator mode
High-speed on-chip oscillator off
Low-speed on-chip oscillator on = 125 kHz
Divide-by-8, FMR47 = 1
− 130 300 µA
Low-speed clock mode
High-speed on-chip oscillator off
Low-speed on-chip oscillator off
XCIN clock oscillator on = 32 kHz (low drive)
FMR47 = 1
− 130 300 µA
High-speed on-chip oscillator off
Low-speed on-chip oscillator off
XCIN clock oscillator on = 32 kHz (low drive)
Program operation on RAM
Flash memory off, FMSTP = 1
− 30 −µA
Wait mode
High-speed on-chip oscillator off
Low-speed on-chip oscillator on = 125 kHz
While a WAIT instruction is executed
Peripheral clock operation
VCA27 = VCA26 = VCA25 = 0
VCA20 = 1
− 25 70 µA
High-speed on-chip oscillator off
Low-speed on-chip oscillator on = 125 kHz
While a WAIT instruction is executed
Peripheral clock off
VCA27 = VCA26 = VCA25 = 0
VCA20 = 1
− 23 55 µA
High-speed on-chip oscillator off
Low-speed on-chip oscillator off
XCIN clock oscillator on = 32 kHz (high drive)
While a WAIT instruction is executed
VCA27 = VCA26 = VCA25 = 0
VCA20 = 1
BGR trimming circuit disabled (BGRCR0 = 1)
− 3.8 −µA
High-speed on-chip oscillator off
Low-speed on-chip oscillator off
XCIN clock oscillator on = 32 kHz (low drive)
While a WAIT instruction is executed
VCA27 = VCA26 = VCA25 = 0
VCA20 = 1
BGR trimming circuit disabled (BGRCR0 = 1)
− 2 −µA
High-speed on-chip oscillator off
Low-speed on-chip oscillator off
XCIN clock oscillator on = 32 kHz (high drive)
While a WAIT instruction is executed
VCA27 = VCA26 = VCA25 = 0
VCA20 = 1
BGR trimming circuit enabled (BGRCR0 = 0)
− 8 −µA
High-speed on-chip oscillator off
Low-speed on-chip oscillator off
XCIN clock oscillator on = 32 kHz (low drive)
While a WAIT instruction is executed
VCA27 = VCA26 = VCA25 = 0
VCA20 = 1
BGR trimming circuit enabled (BGRCR0 = 0)
− 6 −µA
Stop mode
XCIN clock off, Topr = 25°C
High-speed on-chip oscillator off
Low-speed on-chip oscillator off
CM10 = 1
Peripheral clock off
VCA27 = VCA26 = VCA25 = 0
BGR trimming circuit disabled (BGRCR0 = 1)
− 0.7 3 µA
XCIN clock off, Topr = 85°C
High-speed on-chip oscillator off
Low-speed on-chip oscillator off
CM10 = 1
Peripheral clock off
VCA27 = VCA26 = VCA25 = 0
BGR trimming circuit disabled (BGRCR0 = 1)
− 1.1 −µA
XCIN clock off, Topr = 25°C
High-speed on-chip oscillator off
Low-speed on-chip oscillator off
CM10 = 1
Peripheral clock off
VCA27 = VCA26 = VCA25 = 0
BGR trimming circuit enabled (BGRCR0 = 0)
− 57µA
XCIN clock off, Topr = 85°C
High-speed on-chip oscillator off
Low-speed on-chip oscillator off
CM10 = 1
Peripheral clock off
VCA27 = VCA26 = VCA25 = 0
BGR trimming circuit enabled (BGRCR0 = 0)
− 5.5 −µA
R8C/2H Group, R8C/2J Group 5. Electrical Characteristics
Rev.1.00 Mar 28, 2008 Page 42 of 65
REJ03B0217-0100
Timing requirements
(Unless Otherwise Specified: V
CC = 3 V, VSS = 0 V at Topr = 25°C) [VCC = 3 V]
Figure 5.7 XCIN
Input Timing Diagram when VCC = 3 V
Figure 5.8 TRAIO Input Timing Diagram when V
CC = 3 V
Table 5.20 XCIN
Input
Symbol Parameter
Standard
Unit
Min. Max.
t
c(XCIN) XCIN input cycle time 14 −µs
t
WH(XCIN) XCIN input “H” width 7 −µs
t
WL(XCIN) XCIN input “L” width 7 −µs
Table 5.21 TRAIO Input
Symbol Parameter
Standard
Unit
Min. Max.
t
c(TRAIO) TRAIO input cycle time 300 − ns
t
WH(TRAIO) TRAIO input “H” width 120 − ns
t
WL(TRAIO) TRAIO input “L” width 120 − ns
XCIN input
tWH(XCIN)
tC(XCIN)
tWL(XCIN)
VCC = 3 V
TRAIO input
VCC = 3 V
tC(TRAIO)
tWL(TRAIO)
tWH(TRAIO)
R8C/2H Group, R8C/2J Group 5. Electrical Characteristics
Rev.1.00 Mar 28, 2008 Page 43 of 65
REJ03B0217-0100
i = 0 or 2
Figure 5.9 Serial Interface Timing Diagram when VCC = 3 V
NOTES:
1. When selecting the digital filter by the INTi
input filter select bit, use an INTi input HIGH width of either (1/digital filter clock
frequency × 3) or the minimum value of standard, whichever is greater.
2. When selecting the digital filter by the INTi
input filter select bit, use an INTi input LOW width of either (1/digital filter clock
frequency × 3) or the minimum value of standard, whichever is greater.
Figure 5.10 External Interrupt INTi Input Timing Diagram when VCC = 3 V
Table 5.22 Serial Interface
Symbol Parameter
Standard
Unit
Min. Max.
t
c(CK) CLKi input cycle time 300 − ns
t
W(CKH) CLKi input “H” width 150 − ns
t
W(CKL) CLKi Input “L” width 150 − ns
t
d(C-Q) TXDi output delay time − 80 ns
t
h(C-Q) TXDi hold time 0 − ns
t
su(D-C) RXDi input setup time 70 − ns
t
h(C-D) RXDi input hold time 90 − ns
Table 5.23 External Interrupt INTi (i = 0 or 1) Input
Symbol Parameter
Standard
Unit
Min. Max.
t
W(INH)
INTi input “H” width
380
(1)
− ns
t
W(INL)
INTi input “L” width
380
(2)
− ns
tW(CKH)
tC(CK)
tW(CKL)
th(C-Q)
th(C-D)
tsu(D-C)td(C-Q)
CLKi
TXDi
RXDi
VCC = 3 V
i = 0 or 2
INTi input
tW(INL)
tW(INH)
VCC = 3 V
i = 0 or 1
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R5F212J0SDSP#U0

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Buy R5F212J0SDSP#U0
Manufacturer:
Renesas Electronics
Description:
16-bit Microcontrollers - MCU MCU 2/5V 2K I-Temp Pb-free 20-SSOP
Lifecycle:
New from this manufacturer.
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