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R5F212J0SDSP#U0

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P70
R8C/2H Group, R8C/2J Group 5. Electrical Characteristics
Rev.1.00 Mar 28, 2008 Page 47 of 65
REJ03B0217-0100
i = 0 or 2
Figure 5.13 Serial Interface Timing Diagram when VCC = 2.2 V
NOTES:
1. When selecting the digital filter by the INTi
input filter select bit, use an INTi input HIGH width of either (1/digital filter clock
frequency × 3) or the minimum value of standard, whichever is greater.
2. When selecting the digital filter by the INTi
input filter select bit, use an INTi input LOW width of either (1/digital filter clock
frequency × 3) or the minimum value of standard, whichever is greater.
Figure 5.14 External Interrupt INTi Input Timing Diagram when VCC = 2.2 V
Table 5.28 Serial Interface
Symbol Parameter
Standard
Unit
Min. Max.
t
c(CK) CLKi input cycle time 800 − ns
t
W(CKH) CLKi input “H” width 400 − ns
t
W(CKL) CLKi input “L” width 400 − ns
t
d(C-Q) TXDi output delay time − 200 ns
t
h(C-Q) TXDi hold time 0 − ns
t
su(D-C) RXDi input setup time 150 − ns
t
h(C-D) RXDi input hold time 90 − ns
Table 5.29 External Interrupt INTi (i = 0 or 1) Input
Symbol Parameter
Standard
Unit
Min. Max.
t
W(INH)
INTi input “H” width
1000
(1)
− ns
t
W(INL)
INTi input “L” width
1000
(2)
− ns
tW(CKH)
tC(CK)
tW(CKL)
th(C-Q)
th(C-D)
tsu(D-C)td(C-Q)
CLKi
TXDi
RXDi
VCC = 2.2 V
i = 0 or 2
INTi input
tW(INL)
tW(INH)
VCC = 2.2 V
i = 0 or 1
R8C/2H Group, R8C/2J Group 5. Electrical Characteristics
Rev.1.00 Mar 28, 2008 Page 48 of 65
REJ03B0217-0100
5.2 R8C/2J Group
NOTES:
1. V
CC = 2.2 to 5.5 V at Topr = −20 to 85°C (N version) / −40 to 85°C (D version), unless otherwise specified.
2. The average output current indicates the average value of current measured during 100 ms.
Figure 5.15 Ports P1, P3, P4, and P6 Timing Measurement Circuit
Table 5.30 Absolute Maximum Ratings
Symbol Parameter Condition Rated Value Unit
V
CC Supply voltage −0.3 to 6.5 V
V
I Input voltage −0.3 to VCC + 0.3 V
V
O Output voltage −0.3 to VCC + 0.3 V
P
d Power dissipation Topr = 25°C500mW
T
opr Operating ambient temperature −20 to 85 (N version) /
−40 to 85 (D version)
°C
T
stg Storage temperature −65 to 150 °C
Table 5.31 Recommended Operating Conditions
Symbol Parameter Conditions
Standard
Unit
Min. Typ. Max.
V
CC Supply voltage 2.2 − 5.5 V
V
SS Supply voltage − 0 − V
V
IH Input “H” voltage 0.8 VCC − VCC V
V
IL Input “L” voltage 0 − 0.2 VCC V
I
OH(sum) Peak sum output “H”
current
Sum of all pins IOH(peak) −−−160 mA
I
OH(sum) Average sum output “H”
current
Sum of all pins IOH(avg) −−−80 mA
I
OH(peak) Peak output “H” current All pins −−−10 mA
I
OH(avg) Average output “H”
current
All pins −−−5mA
I
OL(sum) Peak sum output “L”
currents
Sum of all pins IOL(peak) −−160 mA
I
OL(sum) Average sum output “L”
currents
Sum of all pins IOL(avg) −−80 mA
I
OL(peak) Peak output “L” currents All pins −−10 mA
I
OL(avg) Average output “L” current All pins −−5mA
− System clock HRA01 = 0
Low-speed on-chip
oscillator selected
− 125 − kHz
HRA01 = 1
High-speed on-chip
oscillator selected
2.7 V ≤ V
CC ≤ 5.5 V
−−8MHz
HRA01 = 1
High-speed on-chip
oscillator selected
2.2 V ≤ V
CC ≤ 5.5 V
−−4MHz
P1
P3
P4
P6
30pF
R8C/2H Group, R8C/2J Group 5. Electrical Characteristics
Rev.1.00 Mar 28, 2008 Page 49 of 65
REJ03B0217-0100
NOTES:
1. VCC = 2.7 to 5.5 V at Topr = 0 to 60°C, unless otherwise specified.
2. Definition of programming/erasure endurance
The programming and erasure endurance is defined on a per-block basis.
If the programming and erasure endurance is n (n = 100 or 10,000), each block can be erased n times. For example, if 1,024
1-byte writes are performed to block A, a 1 Kbyte block, and then the block is erased, the programming/erasure endurance
still stands at one.
However, the same address must not be programmed more than once per erase operation (overwriting prohibited).
3. Endurance to guarantee all electrical characteristics after program and erase. (1 to Min. value can be guaranteed).
4. In a system that executes multiple programming operations, the actual erasure count can be reduced by writing to sequential
addresses in turn so that as much of the block as possible is used up before performing an erase operation. For example,
when programming groups of 16 bytes, the effective number of rewrites can be minimized by programming up to 128 groups
before erasing them all in one operation. It is also advisable to retain data on the erase count of each block and limit the
number of erase operations to a certain number.
5. If an error occurs during block erase, attempt to execute the clear status register command, then execute the block erase
command at least three times until the erase error does not occur.
6. Customers desiring program/erase failure rate information should contact their Renesas technical support representative.
7. The data hold time includes time that the power supply is off or the clock is not supplied.
Table 5.32 Flash Memory (Program ROM) Electrical Characteristics
Symbol Parameter Conditions
Standard
Unit
Min. Typ. Max.
−
Program/erase endurance
(2)
100
(3)
−−times
− Byte program time − 50 400 µs
− Block erase time − 0.4 9 s
− Program, erase voltage 2.7 − 5.5 V
− Read voltage 2.2 − 5.5 V
− Program, erase temperature 0 − 60 °C
−
Data hold time
(7)
Ambient temperature = 55°C20 −−year
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P70

R5F212J0SDSP#U0

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Buy R5F212J0SDSP#U0
Manufacturer:
Renesas Electronics
Description:
16-bit Microcontrollers - MCU MCU 2/5V 2K I-Temp Pb-free 20-SSOP
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