Block diagram
KS22 Product Brief, Rev. 2, 03/2016
Freescale Semiconductor, Inc. 13
• Configurable idle length detection supporting 1, 2, 4, 8, 16, 32, 64, or 128 idle characters
• Selectable transmitter output and receiver input polarity
3.1.7.6. Synchronous Serial Interface (I
2
S)
• Independent (asynchronous) or shared (synchronous) transmit and receive sections with separate
or shared internal/external clocks and frame syncs, operating in Master or Slave modes, intended
for audio support
• Master or Slave mode operation
• Normal mode operation using frame sync
• Network mode operation, enabling multiple devices to share the port with up to 32 time slots
• Programmable data interface modes, such as I
2
S, LSB-aligned, and MSB-aligned
• Programmable word length (8, 10, 12, 16, 18, 20, 22, or 24 bits)
• AC97 support
3.1.7.7. FlexCAN
• Full implementation of the CAN protocol specification (version 2.0B)
• Flexible mailboxes with data length of 0–8 B
• Each mailbox is configurable as RX or TX, all supporting standard and extended messages
• Individual RX mask registers per mailbox
• Fully-featured RX FIFO with storage capacity of up to six frames, and automatic internal pointer
handling
• Transmission abort capability
• Programmable clock source for the CAN Protocol Interface, either the bus clock or the crystal
oscillator
• Unused structures’ space can be used as general-purpose RAM space
• Listen-Only mode capability
• Programmable Loop-Back mode supporting self-test operation
• Programmable transmission priority scheme: lowest ID, lowest buffer number, or highest priority
• Time Stamp based on 16-bit free-running timer
• Global network time, synchronized by a specific message
• Maskable interrupts
• Independent of the transmission medium (an external transceiver is assumed)
• Short latency time due to an arbitration scheme for high-priority messages
• Low-power modes, with programmable wakeup on bus activity
