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74ALVT16823DGGY

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
74ALVT16823_4 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 04 — 2 August 2005 15 of 20
Philips Semiconductors
74ALVT16823
18-bit bus-interface D-type flip-flop with reset and enable; 3-state
Measurement points are given in Table 9.
a. Input pulse definition
Test data is given in Table 10.
Definitions test circuit:
R
L
= Load resistor.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
V
EXT
= Test voltage for switching times.
b. Test circuit
Fig 10. Load circuitry for switching times
Table 10: Test data
Input Load V
EXT
V
I
f
i
t
W
t
r
, t
f
C
L
R
L
t
PLZ
, t
PZL
t
PLH
, t
PHL
t
PHZ
,t
PZH
3.0 V or V
CC
whichever is
less
≤ 10 MHz 500 ns ≤ 2.5 ns 50 pF 500 Ω 6 V or
2 × V
CC
open GND
001aac221
V
M
V
M
t
W
t
W
10 %
90 % 90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 % 10 %
t
THL
(t
f
)
t
TLH
(t
r
)
t
TLH
(t
r
)
t
THL
(t
f
)
V
EXT
V
CC
V
I
V
O
mna616
DUT
C
L
R
T
R
L
R
L
PULSE
GENERATOR
74ALVT16823_4 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 04 — 2 August 2005 16 of 20
Philips Semiconductors
74ALVT16823
18-bit bus-interface D-type flip-flop with reset and enable; 3-state
13. Package outline
Fig 11. Package outline SOT371-1 (SSOP56)
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.4
0.2
2.35
2.20
0.25
0.3
0.2
0.22
0.13
18.55
18.30
7.6
7.4
0.635
10.4
10.1
1.0
0.6
1.2
1.0
0.85
0.40
8
0
o
o
0.180.251.4 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT371-1
99-12-27
03-02-18
(1)
w M
b
p
D
H
E
E
Z
e
c
v M
A
X
A
y
56
29
MO-118
28
1
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
pin 1 index
0 5 10 mm
scale
SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm
SOT371-1
A
max.
2.8
74ALVT16823_4 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 04 — 2 August 2005 17 of 20
Philips Semiconductors
74ALVT16823
18-bit bus-interface D-type flip-flop with reset and enable; 3-state
Fig 12. Package outline SOT364-1 (TSSOP56)
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(2)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.15
0.05
0.2
0.1
8
0
o
o
0.1
DIMENSIONS (mm are the original dimensions).
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
SOT364-1
99-12-27
03-02-19
w M
θ
A
A
1
A
2
D
L
p
Q
detail X
E
Z
e
c
L
X
(A )
3
0.25
128
56 29
y
pin 1 index
b
H
1.05
0.85
0.28
0.17
0.2
0.1
14.1
13.9
6.2
6.0
0.5 1
8.3
7.9
0.50
0.35
0.5
0.1
0.080.25
0.8
0.4
p
E
v M
A
A
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm
SOT364-1
A
max.
1.2
0
2.5
5 mm
scale
MO-153
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

74ALVT16823DGGY

Mfr. #:
Buy 74ALVT16823DGGY
Manufacturer:
Nexperia
Description:
Flip Flops 18-Bit Bus-Interface D-Type Flip-Flop
Lifecycle:
New from this manufacturer.
Delivery:
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