13
FN8127.4
November 12, 2015
.
Absolute Maximum Ratings Operating Conditions
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . .-65°C to 135°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to 150°C
Voltage on Any Pin with Respect To V
ss
. . . . . . . . . . . . . -1.0V to 7V
D.C. Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Lead Temperature (Soldering, 10s) . . . . . . . . . . . . . . . . . . . . . 300°C
Temperature Range
Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
V
CC
Range
-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
DC Electrical Specifications (Over the recommended operating conditions unless otherwise specified.)
SYMBOL PARAMETER TEST CONDITIONS
LIMITS
UNITMIN TYP MAX
I
CC1
V
CC
Write Current (Active) SCK = V
CC
x 0.1/V
CC
x 0.9 @ 5MHz,
SO = Open
5mA
I
CC2
V
CC
Read Current (Active) SCK = V
CC
x 0.1/V
CC
x 0.9 @ 5MHz,
SO = Open
0.4 mA
I
SB1
V
CC
Standby Current WDT = OFF CS = V
CC
, V
IN
= V
SS
or V
CC
,
V
CC
= 5.5V
A
I
SB2
V
CC
Standby Current WDT = ON CS = V
CC
, V
IN
= V
SS
or V
CC
,
V
CC
= 5.5V
50 µA
I
SB3
V
CC
Standby Current WDT = ON CS = V
CC
,
V
IN
= V
SS
or V
CC
,
V
CC
= 3.6V
20 µA
I
LI
Input Leakage Current V
IN
= V
SS
to V
CC
0.110µA
I
LO
Output Leakage Current V
OUT
= V
SS
to V
CC
0.1 10 µA
V
IL
(Note 1) Input LOW Voltage -0.5 V
CC
x 0.3 V
V
IH
(Note 1) Input HIGH Voltage V
CC
x 0.7 V
CC
+ 0.5 V
V
OL1
Output LOW Voltage V
CC
> 3.3V, I
OL
= 2.1mA 0.4 V
V
OL2
Output LOW Voltage 2V < V
CC
3.3V, I
OL
= 1mA 0.4 V
V
OL3
Output LOW Voltage V
CC
2V, I
OL
= 0.5mA 0.4 V
V
OH1
Output HIGH Voltage V
CC
> 3.3V, I
OH
= -1.0mA V
CC
- 0.8 V
V
OH2
Output HIGH Voltage 2V < V
CC
3.3V, I
OH
= -0.4mA V
CC
- 0.4 V
V
OH3
Output HIGH Voltage V
CC
2V, I
OH
= -0.25mA V
CC
- 0.2 V
V
OLRS
Reset Output LOW Voltage I
OL
= 1mA 0.4 V
Power-Up Timing
SYMBOL PARAMETER MIN MAX UNIT
t
PUR
(Note 2) Power-up to read operation 1 ms
t
PUW
(Note 2) Power-up to write operation 5 ms
Capacitance T
A
= +25°C, f = 1MHz, V
CC
= 5V
SYMBOL TEST MAX UNIT CONDITIONS
C
OUT
(Note 2) Output capacitance (SO, RESET, RESET) 8 pF V
OUT
= 0V
C
IN
(Note 2) Input capacitance (SCK, SI, CS, WP)6pFV
IN
= 0V
NOTES:
1. V
IL
min. and V
IH
max. are for reference only and are not tested.
2. This parameter is periodically sampled and not 100% tested.
X5083
14
FN8127.4
November 12, 2015
Equivalent A.C. Load Circuit at 5V V
CC
5V
SO
100pF
5V
3.3k
RESET
30pF
1.64k
1.64k
OUTPUT
A.C. Test Conditions
Input pulse levels V
CC
x 0.1 to V
CC
x 0.9
Input rise and fall times 10ns
Input and output timing level V
CC
x 0.5
AC Electrical Specifications (Over recommended operating conditions, unless otherwise specified)
SYMBOL PARAMETER
2.7V-5.5V
UNITMIN MAX
DATA INPUT TIMING
f
SCK
Clock frequency 0 3.3 MHz
t
CYC
Cycle time 300 ns
t
LEAD
CS lead time 150 ns
t
LAG
CS lag time 150 ns
t
WH
Clock HIGH time 130 ns
t
WL
Clock LOW time 130 ns
t
SU
Data setup time 20 ns
t
H
Data hold time 20 ns
t
RI
(Note 3) Input rise time s
t
FI
(Note 3) Input fall time s
t
CS
CS deselect time 100 ns
t
WC
(Note 4) Write cycle time 10 ms
DATA OUTPUT TIMING
f
SCK
Clock frequency 0 3.3 MHz
t
DIS
Output disable time 150 ns
t
V
Output valid from clock low 130 ns
t
HO
Output hold time 0 ns
t
RO
(Note 3) Output rise time 50 ns
t
FO
(Note 3) Output fall time 50 ns
NOTES:
3. This parameter is periodically sampled and not 100% tested.
4. t
WC
is the time from the rising edge of CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile write cycle.
X5083
15
FN8127.4
November 12, 2015
Serial Output Timing
Serial Input Timing
Power-Up and Power-Down Timing
SCK
CS
SO
SI
MSB Out MSB–1 Out LSB Out
ADDR
LSB IN
t
CYC
t
V
t
HO
t
WL
t
WH
t
DIS
t
LAG
SCK
CS
SI
SO
MSB IN
t
SU
t
RI
t
LAG
t
LEAD
t
H
LSB IN
t
CS
t
FI
High Impedance
X5083

X5083S8IZ-2.7AT1

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Supervisory Circuits CPU SUP/WDT 8K SPI EE RST LW 2 7-3 6V
Lifecycle:
New from this manufacturer.
Delivery:
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