NCN5193
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6
NCN5193
1
2
3
4
5
6
7
8
32
31
30
29
28
27
26
25
9
10
11
12
13
14
15
16
24
23
22
21
20
19
18
17
Figure 3. Pin Out NCN5193 in 32-pin NQFP (top view)
SCLK
JUMP
KICK
CS
TxA
AREF
DATA
VSS
CDREF
CBIAS
VPOR
VDDA
RxAP
RxAF
RxAFI
RxAN
RESET
TxD
RTS
TEST2
TEST1
XIN
XOUT
VSS
CLK2
VDD
DAC
DACREF
MODE
CD
RxD
CLK1
Table 8. PIN OUT SUMMARY 32−PIN NQFP
Pin No. Signal Name Type Pin Description
1 SCLK Input SPI Serial Clock
2 DATA Input SPI Serial Data
3 JUMP Input Sigma−Delta Modulator Alarm condition value
4 KICK Input Watchdog kick
5 CS Input SPI Serial Chip Select
6 VSS Ground Ground
7 TxA Output Transmit Data Modulator output
8 AREF Input Analog reference voltage
9 CDREF Input Carrier detect reference voltage
10 CBIAS Output Comparator bias current
11 VPOR Input POR measurement point
12 RxAN Input Receive filter amplifier negative terminal
13 VDDA Power Analog supply voltage
14 RxAP Input Receive filter amplifier positive terminal
15 RxAF Output Analog receive filter output
16 RxAFI Input Analog receive comparator input
17 XOUT Output Crystal oscillator output
18 XIN Input Crystal oscillator input
19 VSS Ground Ground
20 TEST1 Input Test pin. Tie to GND
21 TEST2 Input Test pin. Tie to VDD
22 RTSB Input Request to send
23 TxD Input Input transmit data, transmit HART data stream from microcontroller
24 RESETB Open Drain Reset all digital logic when low
25 RxD Output Received demodulated HART data to microcontroller
26 CD Output Carrier detect output
27 MODE Input Mode pin to select external or internal oscillator
28 DACREF Input Sigma−Delta Modulator Reference Voltage
29 DAC Output Sigma−Delta Modulator Output
30 VDD Power Digital supply voltage
31 CLK1 Output Programmable Clock Output 1
32 CLK2 Output Programmable Clock Output 2
− EP Ground Exposed pad. Connect to GND
