SPD EEPROM Operating Conditions
For the latest SPD data, refer to Micron's SPD page: micron.com/spd.
Table 17: SPD EEPROM DC Operating Conditions
Parameter/Condition Symbol Min Nom Max Units
Supply voltage V
DDSPD
– 2.5 – V
Input low voltage: logic 0; all inputs V
IL
–0.5 – V
DDSPD
×
0.3
V
Input high voltage: logic 1; all inputs V
IH
V
DDSPD
×
0.7
– V
DDSPD
+
0.5
V
Output low voltage: 3mA sink current V
DDSPD
> 2V V
OL
– – 0.4 V
Input leakage current: (SCL, SDA) V
IN
= V
DDSPD
or V
SSSPD
I
LI
– – ±5 µA
Output leakage current: V
OUT
= V
DDSPD
or V
SSSPD
, SDA in High-Z I
LO
– – ±5 µA
Notes:
1. Table is provided as a general reference. Consult JEDEC JC-42.4 EE1004 and TSE2004 de-
vice specifications for complete details.
2. All voltages referenced to V
DDSPD
.
Table 18: SPD EEPROM AC Operating Conditions
Parameter/Condition Symbol Min Max Units
Clock frequency
t
SCL 10 1000 kHz
Clock pulse width HIGH time
t
HIGH 260 – ns
Clock pulse width LOW time
t
LOW 500 – ns
Detect clock LOW timeout
t
TIMEOUT 25 35 ms
SDA rise time
t
R – 120 ns
SDA fall time
t
F – 120 ns
Data-in setup time
t
SU:DAT 50 – ns
Data-in hold time
t
HD:DI 0 – ns
Data out hold time
t
HD:DAT 0 350 ns
Start condition setup time
t
SU:STA 260 – ns
Start condition hold time
t
HD:STA 260 – ns
Stop condition setup time
t
SU:STO 260 – ns
Time the bus must be free before a new transi-
tion can start
t
BUF 500 – ns
Write time
t
W – 5 ms
Warm power cycle time off
t
POFF 1 – ms
Time from power on to first command
t
INIT 10 – ms
Note:
1. Table is provided as a general reference. Consult JEDEC JC-42.4 EE1004 and TSE2004 de-
vice specifications for complete details.
8GB (x72, ECC, SR) 288-Pin DDR4 VLP RDIMM
SPD EEPROM Operating Conditions
PDF: CCMTD-1725822587-9935
adf9c1gx72pz.pdf - Rev. D 9/17 EN
23
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