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NCP308MT120TBG

P1-P3P4-P6P7-P9P10-P11
© Semiconductor Components Industries, LLC, 2014
December, 2014 − Rev. 6
1 Publication Order Number:
NCP308/D
NCP308, NCV308
Low Quiescent Current,
Programmable Delay Time,
Supervisory Circuit
The NCP308 series is one of the ON Semiconductor Supervisory
circuit IC families. It is optimized to monitor system voltages from
0.405 V to 5.5 V, asserting an active low open−drain RESET
output,
together with Manual Reset (MR
) Input. The part comes with both
fixed and externally adjustable versions.
Features
• Wide Supply Voltage Range 1.6 to 5.5 V
• Very Low Quiescent Current 1.6 mA
• Fixed Threshold Voltage Versions for Standard Voltage Rails
Including 0.9 V, 1.2 V, 1.25 V, 1.5 V, 1.8 V, 1.9 V, 2.5 V, 2.8 V, 3.0 V,
3.3 V, 5.0 V
• Adjustable Version with Low Threshold Voltage 0.405 V (min)
• High Threshold Voltage Accuracy: 0.31% typ
• Support Manual Reset Input ( MR)
• Open−Drain RESET Output (Push−pull Output upon Request)
• Flexible Delay Time Programmability: 1.25 ms to 10 s
• Temperature Range: −40°C to +125°C
• Small TSOP−6 and WDFN6 2 x 2 mm, Pb−Free packages
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These are Pb−Free Devices
Typical Applications
• DSP or Microcontroller Applications
• Notebook/Desktop Computers
• PDAs/Hand−Held Products
• Portable/Battery−Powered Products
• FPGA/ASIC Applications
MR
VDD
(Optional)
Rpullup
SENSE CT
GND
VDD
CT
R1
R2
Figure 1. Typical Application Circuit for Adjustable
Versions
1 nF
(Optional)
NCP308XXADJ
DSP/
RESET
Figure 2. Typical Application Circuit for Fixed
Versions
Processor
VIN
MR
RESET
MR
VDD
(Optional)
Rpullup
SENSE CT
GND
VDD
CT
DSP/
RESET
Processor
VIN
MR
RESET
See detailed ordering and shipping information in the ordering
information section on page 9 of this data sheet.
ORDERING INFORMATION
TSOP−6
CASE 318G
www.onsemi.com
MARKING
DIAGRAMS
(Note: Microdot may be in either location)
1
XXX, XX= Specific Device Code
A =Assembly Location
Y = Year
W = Work Week
M = Date Code
G = Pb−Free Package
XXXAYWG
G
1
WDFN6
CASE 511BR
XX M
1
NCP308, NCV308
www.onsemi.com
2
VDD
SENSE
−
Vref
+
Control Logic
and Timer
CT
GND
90k
VDD
Adjustable Versions
NCP308SNADJ/NCP308MTADJ
SENSE
VDD
−
Vref
+
CT
Control Logic
and Timer
GND
90k
VDD
NCP308SNXXX/NCP308MTXXX
Fixed Versions
R1
R2
Figure 3. Functional Block Diagrams of Adjustable and Fixed Versions
MR
RESET
MR
RESE
T
Figure 4. Pin Connections Diagram (Top View)
1
2
3
6
5
4
GND
VDD
SENSE
CT
RESET
MR
1
2
3
6
5
4
VDD
SENSE
CT
RESET
MR
GND
Table 1. PIN OUT DESCRIPTION
Name
Pin Number
Description
TSOP−6 WDFN6
VDD 6 1 Supply Voltage. A 0.1uF ceramic capacitor placed close to this pin is helpful for transient and
parasitic.
SENSE 5 2 Sense Input, this is the voltage to be monitored. If the voltage at this terminal drops below the
threshold voltage V
IT
, then RESET is asserted. SENSE does not necessary monitor VDD, it can
monitor any voltage lower than VDD.
CT 4 3
Reset Delay Time Setting Pin. Connecting this pin to VDD through a 40 kW to 200 kW resistor or
leaving it open results in fixed reset delay times. Connecting this pin to a ground referenced
capacitor (≥ 100 pF) gives a user−programmable reset delay time. See the Setting Reset Delay
Time section for more information.
MR 3 4
Manual Reset input, MR low asserts RESET. MR is internally tied to VDD by a 90 kW pull−up
Resistor.
RESET 1 6 RESET Output, is an Active low open drain N−Channel MOSFET output, it is driven to a low
impedance state when RESET
is asserted (either the SENSE input is lower than the threshold
voltage (V
IT
) or the MR pin is set to a logic low). RESET will keep low (asserted) for the reset
delay time after both SENSE is above V
IT
and MR is set to a logic high. A pull−up resistor from
10kW to 1MW should be used on this pin. See Figure 5 for behavior of RESET
depends on VDD,
SENSE and MR
conditions.
GND 2 5 Ground terminal. Should be connected to PCB ground reference
EXP
PAD
− Exposed
Pad
Exposed pad, under WDFN6 package, connect it to ground plane for better thermal dissipation.
NCP308, NCV308
www.onsemi.com
3
tD
tP2
0.0 V
tD
tP1 tD
SENSE
Uncertain State
Figure 5. Timing Diagram Showing MR and SENSE Reset Timing
RESET
MR
V
DD(min)
V
IT
+ V
HYS
V
IT
0.7 V
DD
0.3 V
DD
V
DD
Table 2. TRUTH TABLE
MR SENSE > V
IT
RESET
L N L
L Y L
H N L
H Y H
P1-P3P4-P6P7-P9P10-P11

NCP308MT120TBG

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Buy NCP308MT120TBG
Manufacturer:
ON Semiconductor
Description:
Supervisory Circuits 1.2V NCP308 WDFN6
Lifecycle:
New from this manufacturer.
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