2010-2015 Microchip Technology Inc. DS30009622M-page 47
PIC18F2XXX/4XXX FAMILY
5.3 Single-Supply ICSP Programming
The LVP bit in Configuration register, CONFIG4L, enables Single-Supply (Low-Voltage) ICSP Programming. The LVP
bit defaults to a ‘1’ (enabled) from the factory.
If Single-Supply Programming mode is not used, the LVP bit can be programmed to a ‘0’ and RB5/PGM becomes a digital
I/O pin. However, the LVP bit may only be programmed by entering the High-Voltage ICSP mode, where MCLR
/VPP/RE3
is raised to V
IHH. Once the LVP bit is programmed to a ‘0’, only the High-Voltage ICSP mode is available and only the
High-Voltage ICSP mode can be used to program the device.
5.4 Embedding Configuration Word Information in the HEX File
To allow portability of code, a PIC18F2XXX/4XXX Family programmer is required to read the Configuration Word
locations from the hex file. If Configuration Word information is not present in the hex file, then a simple warning
message should be issued. Similarly, while saving a hex file, all Configuration Word information must be included. An
option to not include the Configuration Word information may be provided. When embedding Configuration Word
information in the hex file, it should start at address, 300000h.
Microchip Technology Inc. feels strongly that this feature is important for the benefit of the end customer.
5.5 Embedding Data EEPROM Information In the HEX File
To allow portability of code, a PIC18F2XXX/4XXX Family programmer is required to read the data EEPROM
information from the hex file. If data EEPROM information is not present, a simple warning message should be issued.
Similarly, when saving a hex file, all data EEPROM information must be included. An option to not include the data
EEPROM information may be provided. When embedding data EEPROM information in the hex file, it should start at
address, F00000h.
Microchip Technology Inc. believes that this feature is important for the benefit of the end customer.
5.6 Checksum Computation
The checksum is calculated by summing the following:
• The contents of all code memory locations
• The Configuration Words, appropriately masked
• ID locations (if any block is code-protected)
The Least Significant 16 bits of this sum is the checksum. The contents of the data EEPROM are not used.
5.6.1 PROGRAM MEMORY
When program memory contents are summed, each 16-bit word is added to the checksum. The contents of program
memory, from 000000h to the end of the last program memory block, are used for this calculation. Overflows from bit
15 may be ignored.
5.6.2 CONFIGURATION WORDS
For checksum calculations, unimplemented bits in Configuration Words should be ignored as such bits always read
back as ‘1’s. Each 8-bit Configuration Word is ANDed with a corresponding mask to prevent unused bits from affecting
checksum calculations.
The mask contains a ‘0’ in unimplemented bit positions, or a ‘1’ where a choice can be made. When ANDed with the
value read out of a Configuration Word, only implemented bits remain. A list of suitable masks is provided in Table 5-5.
Note 1: The High-Voltage ICSP mode is always available, regardless of the state of the LVP bit, by applying
V
IHH to the MCLR/VPP/RE3 pin.
2: While in Low-Voltage ICSP mode, the RB5 pin can no longer be used as a general purpose I/O.
