2010-2015 Microchip Technology Inc. DS30009622M-page 7
PIC18F2XXX/4XXX FAMILY
For PIC18F2685/4685 devices, the code memory space extends from 0000h to 017FFFh (96 Kbytes) in five 16-Kbyte
blocks. For PIC18F2682/4682 devices, the code memory space extends from 0000h to 0013FFFh (80 Kbytes) in four
16-Kbyte blocks. Addresses, 0000h through 0FFFh, however, define a “Boot Block” region that is treated separately
from Block 0. All of these blocks define code protection boundaries within the code memory space.
The size of the Boot Block in PIC18F2685/4685 and PIC18F2682/4682 devices can be configured as 1, 2 or 4K words
(see Figure 2-7). This is done through the BBSIZ<2:1> bits in the Configuration register, CONFIG4L. It is important to
note that increasing the size of the Boot Block decreases the size of Block 0.
TABLE 2-3: IMPLEMENTATION OF CODE MEMORY
Device Code Memory Size (Bytes)
PIC18F2682
000000h-013FFFh (80K)
PIC18F4682
PIC18F2685
000000h-017FFFh (96K)
PIC18F4685
