ZL30119 Data Sheet
20
Zarlink Semiconductor Inc.
12 detected_ref_2 FF Ref4 and ref5 auto-detected frequency value
status register
R
13 detected_ref_3 FF Ref6 and ref7 auto-detected frequency value
status register
R
14 detected_sync_0 EE Sync0 and sync1 auto-detected frequency
value and sync failure status register
R
15 detected_sync_1 0E Sync2 auto-detected frequency value and sync
valid status register
R
16 oor_ctrl_0 33 Control register for the ref0 and ref1 out of
range limit
R/W
17 oor_ctrl_1 33 Control register for the ref2 and ref3 out of
range limit
R/W
18 oor_ctrl_2 33 Control register for the ref4 and ref5 out of
range limit
R/W
19 oor_ctrl_3 33 Control register for the ref6 and ref7 out of
range limit
R/W
1A gst_mask_0 FF Control register to mask the inputs to the guard
soak timer for ref0 to ref3
R/W
1B gst_mask_1 FF Control register to mask the inputs to the guard
soak timer for ref4 to ref7
R/W
1C gst_qualif_time 1A Control register for the guard_soak_timer
qualification time and disqualification time for
the references
R/W
DPLL1 Control
1D dpll1_ctrl_0 See
Register
Description
Control register for the DPLL1 filter control;
phase slope limit, bandwidth and hitless
switching
R/W
1E dpll1_ctrl_1 See
Register
Description
Holdover update time, filter_out_en,
freq_offset_en, revert enable
R/W
1F dpll1_modesel See
Register
Description
Control register for the DPLL1 mode of
operation
R/W
20 dpll1_refsel 00 DPLL1 reference selection or reference
selection status
R/W
21 dpll1_ref_fail_mask 3C Control register to mask each failure indicator
(SCM, CFM, PFM and GST) used for automatic
reference switching and automatic holdover
R/W
22 dpll1_wait_to_restore 00 Control register to indicate the time to restore a
previous failed reference
R/W
Addr
(Hex)
Register
Name
Reset
Value
(Hex)
Description Type
Table 5 - Register Map (continued)