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ADUM4120-1ARIZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
Isolated, Precision Gate Drivers
with 2 A Output
Data Sheet
ADuM4120/ADuM4120-1
Rev. 0 Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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Tel: 781.329.4700 ©2017 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
2.3 A peak output current (<2 Ω R
DSON_x
)
2.5 V to 6.5 V V
DD1
input
4.5V to 35 V V
DD2
output
UVLO at 2.3 V V
DD1
Multiple UVLO options on V
DD2
Grade A—4.4 V (typical) positive going threshold
Grade B—7.3 V (typical) positive going threshold
Grade C—11.3 V (typical) positive going threshold
Precise timing characteristics
79 ns maximum isolator and driver propagation delay
falling edge (ADuM4120)
CMOS input logic levels
High common-mode transient immunity: 150 kV/μs
High junction temperature operation: 125°C
Default low output
Safety and regulatory approvals (pending)
UL recognition per UL 1577
5 kV rms for 1 minute SOIC long package
CSA Component Acceptance Notice 5A
VDE certificate of conformity (pending)
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
V
IORM
= 849 V peak
8 mm creepage
Wide body, 6-lead SOIC with increased creepage
APPLICATIONS
Switching power supplies
IGBT/MOSFET gate drivers
Industrial inverters
Gallium nitride (GaN)/silicon carbide (SiC) power devices
GENERAL DESCRIPTION
The ADuM4120/ADuM4120-1
1
are 2 A isolated, single-channel
drivers that employ Analog Devices, Inc., iCoupler® technology
to provide precision isolation. The ADuM4120/ADuM4120-1
provide 5 kV rms isolation in the 6-lead wide body SOIC package
with increased creepage. Combining high speed CMOS and
monolithic transformer technology, these isolation components
provide outstanding performance characteristics, such as the
combination of pulse transformers and gate drivers.
The ADuM4120/ADuM4120-1 operate with input supplies
ranging from 2.5 V to 6.5 V, providing compatibility with lower
voltage systems. In comparison to gate drivers employing
high voltage level translation methodologies, the ADuM4120/
ADuM4120-1 offer the benefit of true, galvanic isolation between
the input and the output.
Options exist for models with and without an input glitch filter.
The glitch filter helps reduce the chance of noise on the input pin
triggering an output.
As a result, the ADuM4120/ADuM4120-1 provide reliable
control over the switching characteristics of insulated gate
bipolar transistor (IGBT)/metal-oxide semiconductor field effect
transistor (MOSFET) configurations over a wide range of
switching voltages.
FUNCTIONAL BLOCK DIAGRAM
UVLO
UVLO TSD
ENCODE
DECODE
AND
LOGIC
V
DD1
V
IN
GND
1
V
DD2
V
OUT
GND
2
1
2
3
6
5
4
ADuM4120/
ADuM4120-1
15493-001
Figure 1.
1
Protected by U.S. Patents 5,952,849; 6,873,065; 7,075,239. Other patents pending.
ADuM4120/ADuM4120-1 Data Sheet
Rev. 0 | Page 2 of 17
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Characteristics ............................................................. 3
Regulatory Information ............................................................... 4
Package Characteristics ............................................................... 5
Insulation and Safety Related Specifications ............................ 5
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics .............................................................................. 5
Recommended Operating Conditions ...................................... 6
Absolute Maximum Ratings ............................................................ 7
ESD Caution .................................................................................. 7
Pin Configuration and Function Descriptions ..............................8
Typical Performance Characteristics ..............................................9
Theory of Operation ...................................................................... 12
Applications Information .............................................................. 13
PCB Layout ................................................................................. 13
Propagation Delay Related Parameters ................................... 13
Thermal Limitations and Switch Load Characteristics ......... 13
Undervoltage Lockout (UVLO) ............................................... 13
Output Load Characteristics ..................................................... 14
Power Dissipation....................................................................... 14
DC Correctness and Magnetic Field Immunity ........................... 14
Insulation Lifetime ..................................................................... 15
Outline Dimensions ....................................................................... 17
Ordering Guide .......................................................................... 17
REVISION HISTORY
5/2017—Revision 0: Initial Version
Data Sheet ADuM4120/ADuM4120-1
Rev. 0 | Page 3 of 17
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Low-side voltages referenced to GND1. High-side voltages referenced to GND
2
; 2.5 V ≤ V
DD1
≤ 6.5 V; 4.5 V ≤ V
DD2
≤ 35 V, and TJ = −40°C
to +125°C. All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted. All
typical specifications are at T
J
= 25°C, V
DD1
= 5.0 V, and V
DD2
= 15 V, unless otherwise noted.
Table 1.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
High-Side Power Supply
V
DD2
Input Voltage V
DD2
4.5 35 V
V
DD2
Input Current, Quiescent I
DD2(Q)
1.7 2.6 mA
Logic Supply
V
DD1
Input Voltage V
DD1
2.5 6.5 V
Input Current I
DD1
3.6 5 mA V
IN
= high
Logic Input V
IN
V
IN
Input Current
I
VIN
−1 0.01 +1 μA
Logic Input Voltage
High V
IH
0.7 × V
DD1
V 2.5 V ≤ V
DD1
≤ 5 V
3.5
V V
DD1
> 5 V
Low V
IL
0.3 × V
DD1
V 2.5 V ≤ V
DD1
≤ 5 V
1.5 V V
DD1
> 5 V
Undervoltage Lockout (UVLO)
V
DD1
Positive Going Threshold V
VDD1UV+
2.45 2.5 V
Negative Going Threshold V
VDD1UV−
2.3 2.35 V
Hysteresis V
VDD1UVH
0.1 V
V
DD2
Grade A
Positive Going Threshold V
VDD2UV+
4.4 4.5 V
Negative Going Threshold V
VDD2UV−
4.1 4.2 V
Hysteresis V
VDD2UVH
0.2 V
Grade B
Positive Going Threshold V
VDD2UV+
7.3 7.5 V
Negative Going Threshold V
VDD2UV−
6.9 7.1 V
Hysteresis V
VDD2UVH
0.2 V
Grade C
Positive Going Threshold V
VDD2UV+
11.3 11.6 V
Negative Going Threshold V
VDD2UV−
10.8 11.1 V
Hysteresis V
VDD2UVH
0.2 V
Thermal Shutdown (TSD)
TSD Positive Edge T
TSD_POS
155 °C
TSD Hysteresis T
TSD_HYST
30 °C
Internal NMOS Gate Resistance R
DSON_N
0.6 1.6 Ω Tested at 250 mA, V
DD2
= 15 V
0.6 1.6 Ω Tested at 1 A, V
DD2
= 15 V
Internal PMOS Gate Resistance R
DSON_P
0.8 1.8 Ω Tested at 250 mA, V
DD2
= 15 V
0.8 1.8 Ω Tested at 1 A, V
DD2
= 15 V
Peak Output Current I
PK
2.3 A V
DD2
= 12 V, 4 Ω gate resistance
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

ADUM4120-1ARIZ

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Manufacturer:
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Description:
Gate Drivers Iso Gate Drvr w/2A output
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