Data Sheet ADuM4120/ADuM4120-1
Rev. 0 | Page 12 of 17
THEORY OF OPERATION
Gate drivers are required in situations where fast rise times of
switching device gates are desired. The gate signal for most
enhancement type power devices are referenced to a source or
emitter node. The gate driver must be able to follow this source
or emitter node, necessitating isolation between the controlling
signal and the output of the gate driver in topologies where the
source or emitter nodes swing, such as a half bridge. Gate switching
times are a function of the drive strength of the gate driver. Buffer
stages before a CMOS output reduce total delay time and
increase the final drive strength of the driver.
The ADuM4120/ADuM4120-1 achieve isolation between the
control side and the output side of the gate driver by means of
a high frequency carrier that transmits data across the isolation
barrier using iCoupler chip scale transformer coils separated by
layers of polyimide isolation. The encoding scheme used by the
ADuM4120/ADuM4120-1 is a positive logic on/off keying (OOK),
meaning a high signal is transmitted by the presence of the carrier
frequency across the iCoupler chip scale transformer coils. Positive
logic encoding ensures that a low signal is seen on the output
when the input side of the gate driver is not powered. A low state is
the most common safe state in enhancement mode power devices,
driving in situations where shoot through conditions can exist.
The architecture is designed for high common-mode transient
immunity and high immunity to electrical noise and magnetic
interference. Radiated emissions are minimized with a spread
spectrum OOK carrier and other techniques such as differential
coil layout. Figure 20 illustrates the encoding used by the
ADuM4120/ADuM4120-1.
TRANSMITTER
GND
1
GND
2
V
IN
V
OUT
RECEIVER
REGULATOR REGULATOR
15493-120
Figure 20. Operational Block Diagram of OOK Encoding
