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74LVC109PW,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
74LVC109 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 29 November 2012 7 of 17
NXP Semiconductors
74LVC109
Dual JK flip-flop with set and reset; positive-edge trigger
[1] Typical values are measured at T
amb
=25C and V
CC
= 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
[2] t
pd
is the same as t
PLH
and t
PHL
.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
t
W
pulse width clock HIGH or LOW; see Figure 5
V
CC
= 1.65 V to 1.95 V 5.0 - - 5.0 - ns
V
CC
= 2.3 V to 2.7 V 4.0 - - 4.0 - ns
V
CC
= 2.7 V 3.3 - - 3.3 - ns
V
CC
= 3.0 V to 3.6 V 3.3 2.0 - 3.3 - ns
set or reset HIGH or LOW; see Figure 6
V
CC
= 1.65 V to 1.95 V 5.0 - - 5.0 - ns
V
CC
= 2.3 V to 2.7 V 4.0 - - 4.0 - ns
V
CC
= 2.7 V 3.0 - - 3.0 - ns
V
CC
= 3.0 V to 3.6 V 3.0 - - 3.0 - ns
t
rec
recovery
time
nSD, nRD to nCP; see Figure 6
V
CC
= 1.65 V to 1.95 V 5.5 - - 5.5 - ns
V
CC
= 2.3 V to 2.7 V 4.0 - - 4.0 - ns
V
CC
= 2.7 V 3.2 - - 3.2 - ns
V
CC
= 3.0 V to 3.6 V 3.0 - - 3.0 - ns
t
su
set-up time nJ and nK to CP; see Figure 5
V
CC
= 1.65 V to 1.95 V 5.0 - - 5.0 - ns
V
CC
= 2.3 V to 2.7 V 3.5 - - 3.5 - ns
V
CC
= 2.7 V 2.7 - - 2.7 - ns
V
CC
= 3.0 V to 3.6 V 2.5 - - 2.5 - ns
t
h
hold time nJ and nK to nCP; see Figure 5
V
CC
= 1.65 V to 1.95 V 3.0 - - 3.0 - ns
V
CC
= 2.3 V to 2.7 V 2.5 - - 2.5 - ns
V
CC
= 2.7 V 2.2 - - 2.2 - ns
V
CC
= 3.0 V to 3.6 V 2.0 - - 2.0 - ns
f
max
maximum
frequency
see Figure 5
V
CC
= 1.65 V to 1.95 V 100 - - 80 - MHz
V
CC
= 2.3 V to 2.7 V 125 - - 100 - MHz
V
CC
= 2.7 V 150 - - 120 - MHz
V
CC
= 3.0 V to 3.6 V 150 330 - 120 - MHz
t
sk(o)
output skew
time
V
CC
= 3.0 V to 3.6 V
[3]
- - 1.0 - 1.5 ns
C
PD
power
dissipation
capacitance
V
I
=GNDtoV
CC
[4]
V
CC
= 1.65 V to 1.95 V - 11.4 - - - pF
V
CC
= 2.3 V to 2.7 V - 17.6 - - - pF
V
CC
= 3.0 V to 3.6 V - 23.1 - - - pF
Table 7. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
74LVC109 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 29 November 2012 8 of 17
NXP Semiconductors
74LVC109
Dual JK flip-flop with set and reset; positive-edge trigger
[4] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz; f
o
= output frequency in MHz
C
L
= output load capacitance in pF
V
CC
= supply voltage in Volts
N = number of inputs switching
(C
L
V
CC
2
f
o
) = sum of the outputs
11. AC waveforms
Measurement points are given in Table 8.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig 5. Clock propagation delays, pulse width, set-up, hold times, and maximum frequency
mna860
t
h
t
su
t
h
t
PHL
t
PHL
t
W
t
PLH
t
PLH
t
su
1/f
max
V
M
V
M
V
M
V
M
V
I
GND
V
I
GND
nCP input
nJ, nK input
V
OH
V
OL
nQ output
V
OH
V
OL
nQ output
74LVC109 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 29 November 2012 9 of 17
NXP Semiconductors
74LVC109
Dual JK flip-flop with set and reset; positive-edge trigger
Measurement points are given in Table 8.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 6. Set and reset propagation delays, pulse widths and recovery times
mna861
t
rem
t
PHL
t
PHL
t
W
t
PLH
t
PLH
V
M
V
M
V
M
t
W
V
M
V
M
V
I
GND
V
I
GND
nSD input
V
I
GND
nRD input
nCP input
V
OH
V
OL
nQ output
V
OH
V
OL
nQ
output
Table 8. Measurement points
Supply voltage Input Output
V
CC
V
I
V
M
V
M
1.2 V V
CC
0.5 V
CC
0.5 V
CC
1.65 V to 1.95 V V
CC
0.5 V
CC
0.5 V
CC
2.3 V to 2.7 V V
CC
0.5 V
CC
0.5 V
CC
2.7 V 2.7 V 1.5 V 1.5 V
3.0 V to 3.6 V 2.7 V 1.5 V 1.5 V
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

74LVC109PW,118

Mfr. #:
Buy 74LVC109PW,118
Manufacturer:
NXP Semiconductors
Description:
Flip Flops 3.3V DUAL JK SET
Lifecycle:
New from this manufacturer.
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