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ISL6150IBZ-T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
4
FN9039.5
December 3, 2015
.
Absolute Maximum Ratings Thermal Information
Supply Voltage (V
DD
to V
EE
) . . . . . . . . . . . . . -0.3V to 100V
DRAIN, PWRGD, PWRGD Voltage . . . . . . . . . . -0.3V to 100V
UV, OV Input Voltage . . . . . . . . . . . . . . . . . . . -0.3V to 60V
SENSE, GATE Voltage . . . . . . . . . . . . . . . . . . . -0.3V to 20V
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7 . . .2000V
Operating Conditions
Temperature Range (Industrial) . . . . . . . . . .-40°C to +85°C
Temperature Range (Commercial) . . . . . . . . . 0°C to +70°C
Supply Voltage Range (Typical) . . . . . . . . . . . 36V to +72V
Thermal Resistance (Typical, Note 4)
JA
(°C/W)
8 Lead SOIC. . . . . . . . . . . . . . . . . . . . . . . 95
Maximum Junction Temperature (Plastic Package) . . +150°C
Maximum Storage Temperature Range . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
4.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379 for details.
Electrical Specifications V
DD
= +48V, VEE = +0V Unless Otherwise Specified. All tests are over the full temperature
range; either Commercial (0°C to +70°C) or Industrial (-40°C to +85°C). Typical specs are
at +25°C. Boldface limits apply over the operating temperature range, -40°C to
+85°C.
PARAMETER SYMBOL
TEST
CONDITIONS
TEST
LEVEL OR
NOTES
PART NUMBER
OR GRADE
UNITS
MIN
(Note 7) TYP
MAX
(Note 7)
DC PARAMETRIC
Supply Operating Range V
DD
10 - 80 V
Supply Current I
DD
UV = 3V; OV = V
EE
;
SENSE = V
EE
; V
DD
= 80V
0.6 0.9 1.3 mA
GATE PIN
Gate Pin Pull-Up Current I
PU
Gate Drive on, V
GATE =
V
EE
-30 -45 -60 µA
Gate Pin Pull-Down Current I
PD
Gate Drive off; any fault
condition
24 32 70 mA
External Gate Drive -V
GATE
(V
GATE -
V
EE)
, 17V V
DD
80V 10 14 15 V
(V
GATE -
V
EE)
, 10V V
DD
17V 5 5.4 6.2 15 V
SENSE PIN
Circuit Breaker Trip Voltage V
CB
V
CB
= (V
SENSE
- V
EE
) 40 50 60 mV
SENSE Pin Current I
SENSE
V
SENSE
= 50mV - 0 -0.5 µA
UV PIN
UV Pin High Threshold Voltage V
UVH
UV Low to High Transition 1.213 1.243 1.272 V
UV Pin Low Threshold Voltage V
UVL
UV High to Low Transition 1.198 1.223 1.247 V
UV Pin Hysteresis V
UVHY
7 20 50 mV
UV Pin Input Current I
INUV
V
UV
= V
EE
- -0.05 -0.5 µA
OV PIN
OV Pin High Threshold Voltage V
OVH
OV Low to High Transition 1.198 1.223 1.247 V
OV Pin Low Threshold Voltage V
OVL
OV High to Low Transition 1.165 1.203 1.232 V
OV Pin Hysteresis V
OVHY
7 20 50 mV
OV Pin Input Current I
INOV
V
OV
= V
EE
- -0.05 -0.5 µA
ISL6140, ISL6150
5
FN9039.5
December 3, 2015
DRAIN PIN
Power Good Threshold (L to H) V
PGLH
V
DRAIN
- V
EE
, Low to High
Transition
1.55 1.70 1.87 V
Power Good Threshold (H to L) V
PGHL
V
DRAIN
- V
EE
, High to Low
Transition
1.10 1.25 1.42 V
Power Good Threshold Hysteresis V
PGHY
0.30 0.45 0.60 V
Drain Input Bias Current I
DRAIN
V
DRAIN
= 48V 10 35 60 µA
ISL6140 (PWRGD
PIN: L VERSION)
PWRGD Output Low Voltage V
OL
(V
DRAIN
- V
EE)
< V
PG
I
OUT
= 1mA
- 0.28 0.50 V
I
OUT
= 3mA - 0.88 1.20
I
OUT
= 5mA - 1.45 1.95 V
Output Leakage I
OH
V
DRAIN
= 48V, V
PWRGD
= 80V - 0.05 10 µA
ISL6150 (PWRGD PIN: H VERSION)
PWRGD Output Low Voltage
(PWRGD-DRAIN)
V
OL
V
DRAIN
= 5V, I
OUT
= 1mA - 0.80 1.0 V
PWRGD Output Impedance R
OUT
(V
DRAIN
- V
EE)
< V
PG
3.5 6.2 9.0 k
AC TIMING
OV High to GATE Low t
PHLOV
(Figures 1, 3A) 0.6 1.6 3.0 µs
OV Low to GATE High t
PLHOV
(Figures 1, 3A) 1.0 7.8 12.0 µs
UV Low to GATE Low t
PHLUV
(Figures 1, 3B) 0.6 1.3 3.0 µs
UV High to GATE High t
PLHUV
(Figures 1, 3B) 1.0 8.4 12.0 µs
SENSE High to GATE Low t
PHLSENSE
(Figures 1, 2) 2 3 4 µs
ISL6140 (L VERSION)
DRAIN Low to PWRGD
Low t
PHLPG
(Figures 1, 4A) 0.1 0.9 2.0 µs
DRAIN High to PWRGD
High t
PLHPG
(Figures 1, 4A) 0.1 0.7 2.0 µs
ISL6150 (H VERSION)
DRAIN Low to (PWRGD-DRAIN)
High
t
PHLPG
(Figures 1, 4B) 6 0.1 0.9 2.0 µs
DRAIN High to (PWRGD-DRAIN)
Low
t
PLHPG
(Figures 1, 4B) 6 0.1 0.8 2.0 µs
NOTES:
5. Typical value depends on V
DD
voltage; see Figure 13, “V
GATE
vs V
DD
” (<20V).
6. PWRGD is referenced to DRAIN; V
PWRGD
-V
DRAIN
= 0V.
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
Electrical Specifications V
DD
= +48V, VEE = +0V Unless Otherwise Specified. All tests are over the full temperature
range; either Commercial (0°C to +70°C) or Industrial (-40°C to +85°C). Typical specs are
at +25°C. Boldface limits apply over the operating temperature range, -40°C to
+85°C. (Continued)
PARAMETER SYMBOL
TEST
CONDITIONS
TEST
LEVEL OR
NOTES
PART NUMBER
OR GRADE
UNITS
MIN
(Note 7) TYP
MAX
(Note 7)
ISL6140, ISL6150
6
FN9039.5
December 3, 2015
Test Circuit and Timing Diagrams
FIGURE 1. TYPICAL TEST CIRCUIT FIGURE 2. SENSE TO GATE TIMING
FIGURE 3A. OV TO GATE TIMING FIGURE 3B. UV TO GATE TIMING
FIGURE 3. OV AND UV TO GATE TIMING
FIGURE 4A. DRAIN TO PWRGD
TIMING (ISL6140)
FIGURE 4B. DRAIN TO PWRGD TIMING (ISL6150)
FIGURE 4. DRAIN TO PWRGD
/PWRGD TIMING
OV
V
EE
5
7
6
4
3
2
GATE
DRAIN
UV
SENSE
PWRGD
1
V
DD
8
5V
V
OV
V
UV
48V
V
DRAIN
V
SENSE
ISL6140
ISL6150
R = 5k
+
-
SENSE
GATE
t
PHLSENSE
1V
50mV
OV
GATE
t
PHLOV
t
PLHOV
0V
2V
1V
1.223V 1.203V
1V
0V
13V
UV
GATE
t
PHLUV
t
PLHUV
2V
0V
1V
1.223V 1.243V
1V
13V
0V
t
PLHPG
t
PHLPG
DRAIN
PWRGD
1.8V
1.4V
1.0V
1.0V
DRAIN
PWRGD
t
PLHPG
t
PHLPG
1.8V
1.4V
1.0V
1.0V
ISL6140, ISL6150
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

ISL6150IBZ-T

Mfr. #:
Buy ISL6150IBZ-T
Manufacturer:
Renesas / Intersil
Description:
Hot Swap Voltage Controllers 8LD HOT SWAP CNTRLR ENABLE
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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