TEF6721HL_4 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 04 — 20 December 2005 13 of 48
Philips Semiconductors
TEF6721HL
Car radio tuner front-end for digital IF
8.2.4 Write mode: data byte 2
8.2.5 Write mode: data byte 3
Table 9: Description of data byte 1 bits
Bit Symbol Description
7 to 0 PLL[7:0] Setting of programmable counter of synthesizer PLL. Lower byte of
PLL divider word.
Table 10: Format of data byte 2
7 6 5 4 3 2 1 0
PRESET DAA6 DAA5 DAA4 DAA3 DAA2 DAA1 DAA0
Table 11: Description of data byte 2 bits
Bit Symbol Description
7 PRESET Preset. If PRESET = 0, then programmable divider and antenna DAA
locked. If PRESET = 1, then writing to programmable divider and
antenna DAA enabled.
6 to 0 DAA[6:0] Setting of antenna digital auto alignment.
Table 12: Format of data byte 3
7 6 5 4 3 2 1 0
- FREF2 FREF1 FREF0 - BND1 BND0 AMFM
Table 13: Description of data byte 3 bits
Bit Symbol Description
7 - This bit is not used and should be set to logic 0.
6 to 4 FREF[2:0] Reference frequency for synthesizer. These 3 bits determine the
reference frequency, see
Table 14.
3 - This bit is not used and should be set to logic 0.
2 and 1 BND[1:0] Band switch. These 2 bits select the frequency in AM and FM mode, see
Table 15 and Table 16.
0 AMFM AM or FM switch. If AMFM = 0, then FM mode. If AMFM = 1, then AM
mode.
Table 14: Reference frequency setting
FREF2 FREF1 FREF0 f
ref
(kHz)
000100
10050
01025
11020
00110
10110
01110
11110
TEF6721HL_4 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 04 — 20 December 2005 14 of 48
Philips Semiconductors
TEF6721HL
Car radio tuner front-end for digital IF
[1] X = don’t care.
8.2.6 Write mode: data byte 4
Table 15: FM band selection bits
BND1 BND0 Frequency band VCO divider Charge pump current
0 0 FM standard 2 130 µA+3mA
0 1 FM Japan 3 130 µA+3mA
1 0 FM East Europe 3 1 mA
1 1 FM weather 1 300 µA
Table 16: AM band selection bits
[1]
BND1 BND0 Frequency band VCO divider Charge pump current
0 X AM SW 10 1 mA
1 X AM LW/MW 20 1 mA
Table 17: Format of data byte 4
7 6 5 4 3 2 1 0
KAGC AGC1 AGC0 LODX FMINJ - AGCSW MIXGAIN
Table 18: Description of data byte 4 bits
Bit Symbol Description
7KAGCKeyed FM AGC. If KAGC = 0, then keyed FM AGC is off. If KAGC = 1,
then keyed FM AGC is on.
6 and 5 AGC[1:0] Wideband AGC. These 2 bits set the start value of wideband AGC. For
AM, see
Table 19 and for FM, see Table 20.
4 LODX Local or distance. If LODX = 0, then distance mode is on. If LODX = 1,
then local mode is on.
3 FMINJ FM mixer image rejection. If FMINJ = 0, then low injection. If
FMINJ = 1, then high injection.
2 - This bit is not used and should be set to logic 0.
1 AGCSW AGC switch. If AGCSW = 0, then AM AGC in FM mode and FM AGC in
AM mode is off. If AGCSW = 1, then AM AGC PIN diode drive is active in
FM mode and FM AGC PIN diode drive is active in AM mode.
0 MIXGAIN FM mixer gain. If MIXGAIN = 0, then the FM mixer gain is nominal. If
MIXGAIN = 1, then the FM mixer gain is +6 dB.
Table 19: Setting of wideband AGC for AM (m = 0.3)
AGC1 AGC0 AM mixer input voltage (peak value) (mV)
0 0 275
0 1 375
1 0 500
1 1 625
TEF6721HL_4 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 04 — 20 December 2005 15 of 48
Philips Semiconductors
TEF6721HL
Car radio tuner front-end for digital IF
8.2.7 Write mode: data byte 5
8.2.8 Read mode: data byte 0
9. Internal circuitry
Table 20: Setting of wideband AGC for FM
AGC1 AGC0 FM RF mixer input voltage (RMS value) (mV)
118
1012
0116
0020
Table 21: Format of data byte 5
7 6 5 4 3 2 1 0
SWPORT2 SWPORT1 - DAC4 DAC3 DAC2 DAC1 DAC0
Table 22: Description of data byte 5 bits
Bit Symbol Description
7 SWPORT2 Software programmable port 2. If SWPORT2 = 0, then
pin SWPORT2 is inactive (high-impedance). If SWPORT2 = 1, then
pin SWPORT2 is active (pull down to ground).
6 SWPORT1 Software programmable port 1. If SWPORT1 = 0, then
pin SWPORT1 is inactive (high-impedance). If SWPORT1 = 1, then
pin SWPORT1 is active (pull down to ground).
5 - This bit is not used and should be set to logic 0.
4 to 0 DAC[4:0] Setting of crystal frequency DAA. These 5 bits determine the crystal
frequency alignment output voltage.
Table 23: Format of first data byte
7 6 5 4 3 2 1 0
ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0
Table 24: Description of data byte 0 bits
Bit Symbol Description
7 to 0 ID[7:0] Chip ID. These bits contain a constant value (0010 0001 = 21h) for
chip identification purposes.
Table 25: Equivalent pin circuits
Symbol Pin Equivalent circuit
i.c. 1
V
DDA1
2

TEF6721HL/V1S,557

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
RF RECEIVER AM/FM/WB 64LQFP
Lifecycle:
New from this manufacturer.
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