KAF−16200
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16
OPERATION
Table 7. ABSOLUTE MAXIMUM RATINGS
Description Symbol Minimum Maximum Units Notes
Diode Pin Voltages V
diode
–0.5 +20.0 V 1, 2
Gate Pin Voltages V
gate1
−14.3 +14.5 V 1, 3
Reset Gate Pin Voltages V
RG
−0.5 +14.5 V 1
Overlapping Gate Voltages V
1−2
−14.3 +14.5 V 4
Non−Overlapping Gate Voltages V
o−o
−14.3 +14.5 V 5
Output Bias Current I
out
−30 mA 6
LOD Diode Voltage V
LOD
−0.5 +13.5 V 1
Operating Temperature T
OP
0 60 °C 7
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Referenced to pin SUB.
2. Includes pins: RD, VDD, VSS, VOUT.
3. Includes pins: V1, V2, H1, H1L, H2, H2L, OG.
4. Voltage difference between overlapping gates. Includes: V1 to V2, H1/H1L to H2, H1L to OG, V1 to H2.
5. Voltage difference between non−overlapping gates. Includes: V1 to H1/H1L.
6. Avoid shorting output pins to ground or any low impedance source during operation. Amplifier bandwidth increases at higher currents and
lower load capacitance at the expense of reduced gain (sensitivity). Operation at these values will reduce MTTF (Mean Time to Failure).
7. Noise performance will degrade at higher temperatures.
Power−Up Sequence
The sequence chosen to perform an initial power−up is not
critical for device reliability. A coordinated sequence may
minimize noise and the following sequence is
recommended:
1. Connect the ground pins (VSUB).
2. Supply the appropriate biases and clocks to the
remaining pins.
Table 8. DC BIAS OPERATING CONDITIONS
Description Symbol Minimum Nominal Maximum Units Notes
Reset Drain RD 11.3 11.5 11.7 V
Output Amplifier Return VSS 0.7 V
Output Amplifier Supply VDD 14.5 15.0 V
Substrate SUB 0 V
Output Gate OG −2.3 −2.5 −2.7 V
Lateral Drain/Guard LOD 10.8 11.0 11.2 V
Video Output Load Current I
OUT
−5 −10 mA 1
1. An output load sink must be applied to each of the four VOUT pins to activate output amplifier – see Figure 4.