KAF−16200
www.onsemi.com
4
HORIZONTAL REGISTER
Output Structure
Figure 3. Output Architecture (Left or Right)
Floating
Diffusion
HCCD
Charge
Transfer
Source
Follower
#1
Source
Follower
#2
Source
Follower
#3
RD
RG
OG
H1L
H1
H2
VDD
VSS
VOUTX
X= L or R
Note: Represents either the left or the right output. The designation is omitted in the figure.
The output consists of a floating diffusion capacitance
connected to a three−stage source follower. Charge
presented to the floating diffusion (FD) is converted into a
voltage and is current amplified in order to drive off−chip
loads. The resulting voltage change seen at the output is
linearly related to the amount of charge placed on the FD.
Once the signal has been sampled by the system electronics,
the reset gate (RG) is clocked to remove the signal and FD
is reset to the potential applied by reset drain (RD).
Increased signal at the floating diffusion reduces the voltage
seen at the output pin. To activate the output structures, an
off−chip current source must be added to the VOUT pins of
the device. See Figure 4.
