LPC2364_65_66_67_68 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7.1 — 16 October 2013 49 of 69
NXP Semiconductors
LPC2364/65/66/67/68
Single-chip 16-bit/32-bit microcontrollers
11.1 Internal oscillators
[1] Parameters are valid over operating temperature range unless otherwise specified.
[2] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages.
11.2 I/O pins
[1] Applies to standard I/O pins and RESET pin.
11.3 USB interface
[1] Characterized but not implemented as production test. Guaranteed by design.
Table 10. Dynamic characteristic: internal oscillators
T
amb
=
40
C to +85
C; 3.0 V
V
DD(3V3)
3.6 V.
[1]
Symbol Parameter Conditions Min Typ
[2]
Max Unit
f
osc(RC)
internal RC oscillator frequency - 3.96 4.02 4.04 MHz
f
i(RTC)
RTC input frequency - - 32.768 - kHz
Table 11. Dynamic characteristic: I/O pins
[1]
T
amb
=
40
C to +85
C; V
DD(3V3)
over specified ranges.
Symbol Parameter Conditions Min Typ Max Unit
t
r
rise time pin configured as output 3.0 - 5.0 ns
t
f
fall time pin configured as output 2.5 - 5.0 ns
Table 12. Dynamic characteristics of USB pins (full-speed) (LPC2364/66/68 only)
C
L
= 50 pF; R
pu
= 1.5 k
on D+ to V
DD(3V3)
, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
t
r
rise time 10 % to 90 % 8.5 - 13.8 ns
t
f
fall time 10 % to 90 % 7.7 - 13.7 ns
t
FRFM
differential rise and fall time
matching
t
r
/t
f
--109%
V
CRS
output signal crossover voltage 1.3 - 2.0 V
t
FEOPT
source SE0 interval of EOP see Figure 14 160 - 175 ns
t
FDEOP
source jitter for differential transition
to SE0 transition
see Figure 14 2-+5ns
t
JR1
receiver jitter to next transition 18.5 - +18.5 ns
t
JR2
receiver jitter for paired transitions 10 % to 90 % 9-+9ns
t
EOPR1
EOP width at receiver must reject as
EOP; see
Figure 14
[1]
40 --ns
t
EOPR2
EOP width at receiver must accept as
EOP; see
Figure 14
[1]
82 --ns
