DS4026
10MHz to 51.84MHz TCXO
______________________________________________________________________________________ 13
Ordering Information (continued)
PART TEMP RANGE
OUTPUT (f
C
)
(MHz, CMOS)
PIN-PACKAGE TOP MARK*
DS4026S+HCC 0°C to +70°C 19.44 16 SO DS4026-HCC
DS4026S+HCN -40°C to +85°C 19.44 16 SO DS4026-HCN
DS4026S+JCC 0°C to +70°C 20.00 16 SO DS4026-JCC
DS4026S+JCN -40°C to +85°C 20.00 16 SO DS4026-JCN
DS4026S+MCC 0°C to +70°C 38.88 16 SO DS4026-MCC
DS4026S+MCN -40°C to +85°C 38.88 16 SO DS4026-MCN
DS4026S+PCC 0°C to +70°C
40.00
16 SO DS4026-PCC
DS4026S+PCN -40°C to +85°C
40.00
16 SO DS4026-PCN
DS4026S+QCC 0°C to +70°C 51.84 16 SO DS4026-QCC
DS4026S+QCN -40°C to +85°C 51.84 16 SO DS4026-QCN
DS4026S+RCC 0°C to +70°C 24.00 16 SO DS4026-RCC
DS4026S+RCN -40°C to +85°C 24.00 16 SO DS4026-RCN
Ordering Information—Stratum 3
PART TEMP RANGE
OUTPUT (f
C
)
(MHz, CMOS)
PIN-PACKAGE TOP MARK*
DS4026S3+ACN -40°C to +85°C 10.00 16 SO DS4026S3-ACN
DS4026S3+BCN -40°C to +85°C 12.80 16 SO DS4026S3-BCN
DS4026S3+GCN -40°C to +85°C 19.20 16 SO DS4026S3-GCN
DS4026S3+JCN -40°C to +85°C 20.00 16 SO DS4026S3-JCN
+
Denotes a lead(Pb)-free/RoHS-compliant package.
*The top mark will include a “+” for a lead(Pb)-free/RoHS-compliant device.
Chip Information
TRANSISTOR COUNT: 77, 712
SUBSTRATE CONNECTED TO GROUND
PROCESS: CMOS
+
Denotes a lead(Pb)-free/RoHS-compliant package.
*The top mark will include a “+” for a lead(Pb)-free/RoHS-compliant device.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
16 SO (300 mils) W16+H1
21-0042
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages
.
