LC75829PE, LC75829PW
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10
(2) When CL is stopped at the high level
Note: DD is the direction data.
• CCB address .......... “41H”
• D1 to D208 ............ Display data
• PS10, PS11 ............ General-purpose output port (P1) function setting control data
• EXF ....................... External clock operating frequency setting control data
• P0 to P2 ................. Segment output port/general-purpose output port switching control data
• DT ......................... 1/4-duty 1/3-bias drive or 1/3-duty 1/3-bias drive switching control data
• DN ......................... S52 pin and S53/OSCI pin state setting control data
• FC0 to FC2 ............ Common/segment output waveform frame frequency control data
• OC ......................... Internal oscillator operating mode/external clock operating mode switching control data
• SC .......................... Segment on/off control data
• BU ......................... Normal mode/power-saving mode control data
FC0 SC
B1 B0
D2 D1 0 0 0 0 1 0
D48 D47
DI
CL
CE
B3 B2 A1 A0 A3 A2
1 0 0
D50 D49 D52 D51
0 0 0 P1 P0
EXF
PS11
DT
P2
DN BU
0 0
PS10
OC FC1 FC2
0
B1 B0
0 0 0 0 1 0
D100
D54 D53
B3 B2 A1 A0 A3 A2
1 0 0 0 0 0 0 0 1 0
D104 D103 D102 D101
0 0 0 0 0 0 0 0 0 0 0
D99
0
B1 B0
0 0 0 0 1 0
D152 D106 D105 D151
B3 B2 A1 A0 A3 A2
1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
0 0 0 0
0 0 0 0
0
B1 B0
0 0 0 0 1 0
D204 D154 D153 D203
B3 B2 A1 A0 A3 A2
1 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0
D208 D207 D206 D205 D202 D201 D200 D199
Fixed data
18 bits
DD
2 bits
Control data
18 bits
Display data
52 bits
CCB address
8 bits
DD
2 bits
Display data
52 bits
CCB address
8 bits
Fixed data
22 bits
DD
2 bits
Display data
48 bits
CCB address
8 bits
Fixed data
14 bits
DD
2 bits
Display data
56 bits
CCB address
8 bits
