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13
Serial Data Transfer Example
1. 1/4 duty
• When 153 or more segments are used
All 288 bits of serial data must be sent.
• When fewer than 153 segments are used
Either 72, 144, or 216 bits of serial data must be sent, depending on the number of segments to be used.
However, the serial data shown below (the D1 to D52 display data and the control data) must always be sent.
2. 1/3 duty
• When 109 or more segments are used
All 216 bits of serial data must be sent.
• When fewer than 109 segments are used
Either 72, or 144 bits of serial data must be sent, depending on the number of segments to be used.
However, the serial data shown below (the D1 to D54 display data and the control data) must always be sent.
72 bits 8 bits
D2 D1
D47
1 0 0 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D48 D49 D50 D51
0 0 0 0
PS11
FC0
EXF
P0 P1 P2 DT DN
FC1 FC2
OC SC BU 0 0
PS10
D52
72 bits 8 bits
D2 D1
D47
D105
1 0 0 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D48 D49 D50 D51
0 0 0 0
PS11
FC0 EXF
P0 P1 P2 DT DN
FC1 FC2
OC SC BU 0 0
1 0 0 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D53
1 0 0 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D106
D54 D99 D100
D101 D102
D151 D152
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PS10
1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
D52
D103 D104
D153
1 0 0 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D154 D199 D204
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
0 0 0 0
D208 D207 D206 D205 D203 D202 D201 D200
72 bits 8 bits
D2 D1
D47
1 0 0 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D48 D49 D50 D51 D53 D54
0 0
PS11
FC0 EXF
P0 P1 P2 DT DN
FC1 FC2
OC SC BU 0 0
PS10
D52
72 bits 8 bits
D2 D1
D47
D109
1 0 0 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D48 D49 D50 D51 D53 D54
0 0
PS11
FC0 EXF
P0 P1 P2 DT DN
FC1 FC2
OC SC BU 0 0
1 0 0 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D55
1 0 0 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D110
D56
D101 D102 D103 D104
D155 D156
D107 D108
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PS10
1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
D52
D105 D106
D157 D158 D159
0
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Control Data Functions
(1) PS10 and PS11 … General-purpose output port (P1) function setting control data
These control data bits set the clock output or general-purpose output function (High or low level output) of the P1
output pin.
PS10 PS11 General-purpose output port (P1) function
0 0 General-purpose output function (High or low level output)
1 0 Clock output function (Clock frequency : fosc/2, f
CK
/2)
0 1 Clock output function (Clock frequency : fosc/8, f
CK
/8)
Note: When is setting (PS10, PS11)=(1,1), the P1 output pin selects the general-purpose output function
(High or low level output).
(2) EXF … External clock operating frequency setting control data
This control data sets the operating frequency of the external clock which input into the OSCI pin, when the external
clock operating mode (OC=”1”) is set. However, this data is effective only when external clock operating mode
(OC= "1") is set.
EXF External clock operating frequency f
CK
[kHz]
0 f
CK
1=300[kHz]typ
1 f
CK
2=38[kHz]typ
(3) P0 to P2 … Segment output port/general-purpose output port switching control data
These control data bits switch the segment output port/general-purpose output port functions of the S1/P1 to S4/P4
output pins.
Control data Output pin state
Note: Sn (n=1 to 4): Segment output ports
Pn (n=1 to 4): General-purpose output ports
P0 P1 P2 S1/P1 S2/P2 S3/P3 S4/P4
0 0 0 S1 S2 S3 S4
0 0 1 P1 S2 S3 S4
0 1 0 P1 P2 S3 S4
0 1 1 P1 P2 P3 S4
1 0 0 P1 P2 P3 P4
Note: When are setting (P0,P1,P2)=(1,0,1), (1,1,0), and (1,1,1), the all P1/S1 to P4/S4 output pins selects the
segment output port.
The table below lists the correspondence between the display data and the output pins when these pins are selected
to be general-purpose output ports.
Output pin
Correspondence display data
1/4 duty 1/3 duty
S1/P1 D1 D1
S2/P2 D5 D4
S3/P3 D9 D7
S4/P4 D13 D10
For example, if the circuit is operated in 1/4 duty and the S4/P4 output pin is selected to be a general-purpose output
port, the S4/P4 output pin will output a high level (V
DD
) when the display data D13 is 1, and will output a low level
(V
SS
) when D13 is 0.
(4) DT … 1/4-duty 1/3-bias drive or 1/3-duty 1/3-bias drive switching control data
This control data bit selects either 1/4-duty 1/3-bias drive or 1/3-duty 1/3-bias drive.
DT Drive scheme The COM4/S51 pin state
Note: COM4: Common output
S51 : Segment output
0 1/4-duty 1/3-bias drive COM4
1 1/3-duty 1/3-bias drive S51
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(5) DN … S52 pin and S53/OSCI pin state setting control data
This control data bit sets state of the S52 pin and the S53/OSCI pin.
DN
Number of display segments Pin state
1/4 duty 1/3 duty S52 S53/OSCI
0 Up to 200 segments Up to 153 segments “L” (V
SS
) “L” (V
SS
)/OSCI
1 Up to 208 segments Up to 159 segments S52 S53/OSCI
Note: “L” (V
SS
) : Low (V
SS
) level output
S52 : Segment output
“L” (V
SS
)/OSCI : Low (V
SS
) level output in internal oscillator operating mode (OC=0)
: External clock input in external clock operating mode (OC=1)
S53/OSCI : Segment output in internal oscillator operating mode (OC=0)
External clock input in external clock operating mode (OC=1)
(6) FC0 to FC2 … Common/segment output waveform fram frequency control data
These control data bits set the frame frequency of the common and segment output waveforms.
Control data Frame frequency fo[Hz]
FC0 FC1 FC2
Internal oscillator operating mode
(The control data OC is 0,
fosc=300[kHz]typ)
External clock operating mode
(The control data OC is 1
and EXF is 0, f
CK
1=300[kHz]typ)
External clock operating mode
(The control data OC is 1
and EXF is 1, f
CK
2=38[kHz]typ)
0 0 0 fosc/6144 f
CK
1/6144 f
CK
2/768
0 0 1 fosc/4608 f
CK
1/4608 f
CK
2/576
0 1 0 fosc/3072 f
CK
1/3072 f
CK
2/384
0 1 1 fosc/2304 f
CK
1/2304 f
CK
2/288
1 0 0 fosc/1536 f
CK
1/1536 f
CK
2/192
1 0 1 fosc/1152 f
CK
1/1152 f
CK
2/144
1 1 0 fosc/768 f
CK
1/768 f
CK
2/96
Note: When is setting (FC0,FC1,FC2)=(1,1,1), the frame frequency is same as frame frequency at the time of the
(FC0,FC1,FC2)=(0,1,0) setting (fosc/3072, f
CK
1/3072, f
CK
2/384).
(7) OC … Internal oscillator operating mode/external clock operating mode switching control data
This control data bit selects either the internal oscillator operating mode or external clock operating mode.
OC Fundamental clock operating mode
I/O pin (S53/OSCI) state
0 Internal oscillator operating mode S53
1 External clock operating mode OSCI
Note: S53: Segment output
OSCI: External clock input
(8) SC … Segment on/off control data
This control data bit controls the on/off state of the segments.
SC Display state
0 On
1 Off
Note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting segment off
waveforms from the segment output pins.
(9) BU … Normal mode/power-saving mode control data
This control data bit selects either normal mode or power-saving mode.
BU Mode
0 Normal mode
1
Power saving mode
In this mode, the internal oscillator circuit stops oscillation (the S53/OSCI pin is configured for segment
output) if the IC is in the internal oscillator operating mode (OC=0) and the IC stops receiving external
clock signals (the S53/OSCI pin is configured for external clock input) if the IC is in the external clock
operating mode (OC=1). The common and segment output pins go to the V
SS
level. However, the S1/P1
to S4/P4 output pins can be used as general-purpose output ports under the control of the data bits P0 to
P2. (The general-purpose output port P1 can not be used as clock output).

LC75829PEH-H

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LCD Drivers LCD DISPLAY DRIVER
Lifecycle:
New from this manufacturer.
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