LC75829PE, LC75829PW
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7
Pin Assignment
Block Diagram
Top view
COM3
S46
S47
S31
S30
S29
S28
S27
S49
S50
COM2
COM1
S52
S53/OSCI
V
DD
V
DD
1
V
DD
2
V
SS
S51/COM4
INH
CE
CL
DI
S26
S25
S24
S23
S22
S21
S20
S19
S18
S17
S44
S45
S42
S43
S38
S39
S36
S37
S40
S41
S34
S35
S15
S16 S33
S13
S14
S11
S12
S8
S9
S10
S6
S7
P4/S4
S5
P1/S1
P2/S2
P3/S3
S32
S48
LC75829PE
(QIP64E)
LC75829PW
(SQFP64)
33 48
32 49
17 64
16 1
S1/P1
S2/P2
S4/P4
S5
CE
CL
DI
COM4/S51
COM3
COM2
COM1
V
SS
V
DD
2
V
DD
1
V
DD
INH
S53/OSCI
SHIFT REGISTER
SEGMENT DRIVER & LATCH
CCB INTERFACE
CLOCK
GENERATOR
COMMON
DRIVER
S52
CONTROL
REGISTER
S3/P3
S50
LC75829PE, LC75829PW
www.onsemi.com
8
Pin Functions
Symbol Pin No. Function Active
I/O
Handling
when
unused
S1/P1 to S4/P4
S5 to S50
S52
1 to 4
5 to 50
55
Segment outputs for displaying the display data transferred by serial data input.
The S1/P1 to S4/P4 pins can be used as general-purpose output ports under serial
data control.
- O OPEN
COM1 to COM3
COM4/S51
54 to 52
51
Common driver outputs
The frame frequency is fo[Hz].
The COM4/S51 pin can be used as a segment output in 1/3 duty.
- O OPEN
S53/OSCI 60
Segment output. This pin can also be used as the external clock input pin when the
external clock operating mode is selected by control data.
- I/O OPEN
CE 62
Serial data transfer inputs. Must be connected to the controller.
CE: Chip enable
CL: Synchronization clock
DI: Transfer data
H I
CL 63
I GND
DI 64 - I
INH
61
Display off control input
INH
= low (V
SS
) ...Display forced off
S1/P1 to S4/P4 = low (V
SS
)
(These pins are forcibly set to the general-purpose output port
function and held at the V
SS
level.)
S9 to S50, S52=low (V
SS
)
COM1 to COM3=low (V
SS
)
COM4/S51=low (V
SS
)
S53/OSCI=low (V
SS
)
(This pin is forcibly set to the segment output port function and
held at the V
SS
level.)
Stops the internal oscillator.
Inhibits external clock input.
INH
= high (V
DD
)...Display on
Enables the internal oscillator circuit.
(Internal oscillator operating mode)
Enables external clock input.
(External clock operating mode)
However, serial data transfer is possible when the display is forced off.
L I GND
V
DD
1 57
Used to apply the LCD drive 2/3 bias voltage externally.
- I OPEN
V
DD
2 58
Used to apply the LCD drive 1/3 bias voltage externally.
- I OPEN
V
DD
56
Power supply pin. A power voltage of 4.5 to 6.0V must be applied to this pin.
- - -
V
SS
59
Ground pin. Must be connected to ground.
- - -
LC75829PE, LC75829PW
www.onsemi.com
9
Serial Data Input
1. 1/4 duty
(1) When CL is stopped at the low level
Note: DD is the direction data.
Fixed data
18 bits
B1 B0
D2 D1 0 1
D50
P1 P0 DI
CL
CE
0 0 0 0 1 0 0
B3 B2 A1 A0 A3 A2
D51
0 0 0
EXF
PS10
SC OC DN DT
0 0
BU
P2
PS11
FC0 FC1 FC2 D52 D47 D48 D49
B1 B0
0 1
D54
D53 0 0 0 0 0 1 0 0
B3 B2 A1 A0 A3 A2
D104 D103
0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
D101 D102
D99
D100
0
B1 B0
0 1
D106
D105
0 0 0 0 0 1 0 0
B3 B2 A1 A0 A3 A2
D152 D151
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
0
D203
B1 B0
0 1
D154
D153
0 0 0 0 0 1 0 0
B3 B2 A1 A0 A3 A2
D204
0 0 0 0 0 1 0 1 0 0 0 0 0
D208 D207 D206 D205 D202 D201 D200 D199
DD
2 bits
Control data
18 bits
Display data
52 bits
CCB address
8 bits
DD
2 bits
Display data
52 bits
CCB address
8 bits
Fixed data
22 bits
DD
2 bits
Display data
48 bits
CCB address
8 bits
Fixed data
14 bits
DD
2 bits
Display data
56 bits
CCB address
8 bits

LC75829PEH-H

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LCD Drivers LCD DISPLAY DRIVER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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