IDT8N4SV75 Data Sheet LVDS FREQUENCY PROGRAMMABLE VCXO
IDT8N4SV75CCD
REVISION B NOVEMBER 6, 2013
7 ©2013 Integrated Device Technology, Inc.
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE: Characterized with V
C
= V
DD
/2.
NOTE: XTAL parameters (initial accuracy, temperature stability, aging and total stability) are guaranteed by manufacturing.
NOTE 1: This parameter is defined in accordance with JEDEC standard 65.
NOTE 2: Please refer to the phase noise plots.
NOTE 3: Please see the FemtoClock NG Ceramic 5x7 Modules Programming guide for more information on PLL feedback modes and the
optimum configuration for phase noise.
NOTE 4: 12kHz to 20MHz.
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: V
C
= 10% to 90% of V
DD
.
NOTE 2: Nominal oscillator gain: Pull range divided by the control voltage tuning range of 3.3V. E.g. for ADC_GAIN [6:0] = 000001 the pull
range is ± 12.5ppm, resulting in an oscillator gain of 25ppm ÷ 3.3V = 7.57ppm/V.
NOTE 3: For best phase noise performance, use the lowest K
V
that meets the requirements of the application.
NOTE 4: BSL = Best Straight Line Fit: Variation of the output frequency vs. control voltage V
C
, in percent. V
C
ranges from 10% to 90% V
DD
.
Table 5B. VCXO Control Voltage Input (V
C
) Characteristics, V
DD
=
3.3V ± 5% or 2.5 ± 5, T
A
= -40°C to 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
K
V
Oscillator Gain, NOTE 1, 2, 3 V
DD
= 3.3V 7.57 477.27 ppm/V
Oscillator Gain, NOTE 1, 2, 3 V
DD
= 2.5V 10 630 ppm/V
L
VC
Control Voltage Linearity;
NOTE 4
BSL Variation -1 ±0.1 +1 %
BW Modulation Bandwidth 100 kHz
Z
VC
VC Input Impedance 500 k
VC
NOM
Nominal Control Voltage V
DD
/2 V
V
C
Control Voltage Tuning Range;
NOTE 4
0V
DD
V
IDT8N4SV75 Data Sheet LVDS FREQUENCY PROGRAMMABLE VCXO
IDT8N4SV75CCD
REVISION B NOVEMBER 6, 2013
8 ©2013 Integrated Device Technology, Inc.
RMS Phase Jitter
SSB Phase Noise dBc/Hz
Offset from Carrier Frequency (Hz)
IDT8N4SV75 Data Sheet LVDS FREQUENCY PROGRAMMABLE VCXO
IDT8N4SV75CCD
REVISION B NOVEMBER 6, 2013
9 ©2013 Integrated Device Technology, Inc.
Parameter Measurement Information
2.5V LVDS Output Load Test Circuit
RMS Phase Jitter
Cycle-to-Cycle Jitter
3.3V LVDS Output Load Test Circuit
Period Jitter
Output Duty Cycle/Pulse Width/Period
V
DD
SCOPE
Q
nQ
2.5V±5%
POWER SUPPLY
+–
Float GND
V
DD
nQ
Q
tcycle n tcycle n+1
tjit(cc) =
|
tcycle n – tcycle n+1
|
1000 Cycles
SCOPE
Q
nQ
3.3V±5%
POWER SUPPLY
+–
Float GND
V
DD
V
OH
V
REF
V
OL
Mean Period
(First edge after trigger)
Reference Point
(Trigger Edge)
1
σ
contains 68.26% of all measurements
2
σ
contains 95.4% of all measurements
3
σ
contains 99.73% of all measurements
4
σ
contains 99.99366% of all measurements
6
σ
contains (100-1.973x10
-7
)% of all measurements
Histogram
t
PW
t
PERIOD
t
PW
t
PERIOD
odc = x 100%

8N4SV75AC-0133CDI8

Mfr. #:
Manufacturer:
Description:
Programmable Oscillators PROGRAMMABLE FEMTOCLOCK
Lifecycle:
New from this manufacturer.
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