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IS82C37A-5

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26
16
FN2967.4
October 2, 2015
82C37A
Absolute Maximum Ratings Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8.0V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.5V to V
CC
+0.5V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range
C82C37A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0
o
C to +70
o
C
I82C37A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to +85
o
C
M82C37A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Thermal Resistance (Typical)
JA
(
o
C/W)
JC
(
o
C/W)
CERDIP Package . . . . . . . . . . . . . . . . 50 10
CLCC Package . . . . . . . . . . . . . . . . . . 65 14
PDIP Package . . . . . . . . . . . . . . . . . . . 50 N/A
PLCC Package . . . . . . . . . . . . . . . . . . 46 N/A
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65
o
C to +150
o
C
Maximum Junction Temperature Ceramic Package . . . . . . . +175
o
C
Maximum Junction Temperature Plastic Package . . . . . . . . +150
o
C
Maximum Lead Temperature Package
(Soldering 10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300
o
C
(PLCC - Lead Tips Only)
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2325 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
DC Electrical Specifications V
CC
= +5.0 10%, T
A
= 0
o
C to +70
o
C (C82C37A)
T
A
= -40
o
C to +85
o
C (I82C37A)
T
A
= -55
o
C to +125
o
C (M82C37A)
SYMBOL PARAMETER MIN MAX UNITS TEST CONDITIONS
VIH Logical One Input Voltage 2 - v C82C37A, I82C37A
2.2 - V M82C37A
VIL Logical Zero Input Voltage - 0.8 V
VIHC CLK Input Logical One Voltage V
CC
-0.8 - V
VILC CLK Input Logical Zero Voltage - 0.8 V
VOH Output HIGH Voltage 3.0 - V IOH = -2.5mA
V
CC
-0.4 - V IOH = -100A
VOL Output LOW Voltage - 0.4 V IOL = +2.5mA all output except EOP
,
IOL = +3.2mA for EOP
pin 36 only.
II Input Leakage Current -1 +1 A VIN = GND or V
CC
, Pins 6, 7, 11-13, 16-19
IO Output Leakage Current -10 +10 A VOUT = GND or V
CC
, Pins 1-4, 21-23, 26-30,
32-40
ICCSB Standby Power Supply
Current
-10AV
CC
= 5.5V, VIN = V
CC
or GND, Outputs Open
ICCOP Operating Power Supply
Current
-2mA/MHzV
CC
= 5.5V, CLK FREQ = Maximum,
VIN = V
CC
or GND, Outputs Open
Capacitance T
A
= +25
o
C
SYMBOL PARAMETER TYP UNITS TEST CONDITIONS
CIN Input Capacitance 25 pF FREQ = 1MHz, All measurements are
referenced to device GND
COUT Output Capacitance 40 pF
CI/O I/O Capacitance 25 pF
17
FN2967.4
October 2, 2015
82C37A
AC Electrical Specifications V
CC
= +5.0V 10%, GND = 0V, T
A
= 0
o
C to +70
o
C (C82C37A),
T
A
= -40
o
C to +85
o
C (I82C37A),
T
A
= -55
o
C to +125
o
C (M82C37A)
SYMBOL PARAMETER
82C37A-5 82C37A 82C37A-12
UNITSMIN MAX MIN MAX MIN MAX
DMA (MASTER) MODE
(1)TAEL AEN HIGH from CLK LOW (S1) Delay
Time
- 175 - 105 - 50 ns
(2)TAET AEN LOW from CLK HIGH (SI) Delay
Time
- 130 - 80 - 50 ns
(3)TAFAB ADR Active to Float Delay from CLK
HIGH
-90-55-55ns
(4)TAFC READ
or WRITE Float Delay from
CLK HIGH
- 120 - 75 - 50 ns
(5)TAFDB DB Active to Float Delay from CLK
HIGH
- 170 - 135 - 90 ns
(6)TAHR ADR from READ
HIGH Hold Time TCY-100 - TCY-75 - TCY-65 - ns
(7)TAHS DB from ADSTB LOW Hold Time TCL-18 - TCL-18 - TCL-18 - ns
(8)TAHW ADR from WRITE
HIGH Hold Time TCY-65 - TCY-65 - TCY-50 - ns
(9)TAK DACK Valid from CLK LOW
Delay Time
- 170 - 105 - 69 ns
EOP
HIGH from CLK HIGH
Delay Time
- 170 - 105 - 90 ns
EOP
LOW from CLK HIGH
Delay Time
- 100 - 60 - 35 ns
(10)TASM ADR Stable from CLK HIGH - 110 - 60 - 50 ns
(11)TASS DB to ADSTB LOW Setup Time TCH-20 - TCH-20 - TCH-20 - ns
(12)TCH CLK HIGH Time (Transitions 10ns) 70 - 55 - 30 - ns
(13)TCL CLK LOW Time (Transitions 10ns) 50 - 43 - 30 - ns
(14)TCY CLK Cycle Time 200 - 125 - 80 - ns
(15)TDCL CLK HIGH to READ
or WRITE LOW
Delay
- 190 - 130 - 120 ns
(16)TDCTR READ
HIGH from CLK HIGH (S4)
Delay Time
- 190 - 115 - 80 ns
(17)TDCTW WRITE
HIGH from CLK HIGH (S4)
Delay Time
- 130 - 80 - 70 ns
(18)TDQ HRQ Valid from CLK HIGH
Delay Time
- 120 - 75 - 30 ns
(19)TEPH EOP
Hold Time from CLK LOW (S2) 90 - 90 - 50 - ns
(20)TEPS EOP
LOW to CLK LOW Setup Time 40 - 25 - 0 - ns
(21)TEPW EOP
Pulse Width 220 - 135 - 50 - ns
82C37A
18
FN2967.4
October 2, 2015
82C37A
(22)TFAAB ADR Valid Delay from CLK HIGH - 110 - 60 - 50 ns
(23)TFAC READ
or WRITE Active from
CLK HIGH
- 150 - 90 - 50 ns
(24)TFADB DB Valid Delay from CLK HIGH - 110 - 60 - 45 ns
(25)THS HLDA Valid to CLK HIGH Setup Time 75 - 45 - 10 - ns
(26)TIDH Input Data from MEMR
HIGH
Hold Time
0-0-0-ns
(27)TIDS Input Data to MEMR
HIGH
Setup Time
155 - 90 - 45 - ns
(28)TODH Output Data from MEMW
HIGH
Hold Time
15 - 15 - TCY-50 - ns
(29)TODV Output Data Valid to MEMW
HIGH TCY-35 - TCY-35 - TCY-10 - ns
(30)TQS DREQ to CLK LOW (SI, S4)
Setup Time
0-0-0-ns
(31)TRH CLK to READY LOW Hold Time 20 - 20 - 10 - ns
(32)TRS READY to CLK LOW Setup Time 60 - 35 - 15 - ns
(33)TCLSH ADSTB HIGH from CLK LOW
Delay Time
-80-70-70ns
(34)TCLSL ADSTB LOW from CLK LOW
Delay Time
- 120 - 120 - 60 ns
(35)TWRRD READ
HIGH Delay from WRITE HIGH 0 - 0 - 5 - ns
(36)TRLRH READ
Pulse Width, Normal Timing 2TCY-60 - 2TCY-60 - 2TCY-55 - ns
(37)TSHSL ADSTB Pulse Width TCY-80 - TCY-50 - TCY-35 - ns
(38)TWLWHA Extended WRITE
Pulse Width 2TCY-100 - 2TCY-85 - 2TCY-80 - ns
(39)TWLWH WRITE
Pulse Width TCY-100 - TCY-85 - TCY-80 - ns
(40)TRLRHC READ
Pulse Width, Compressed TCY-60 - TCY-60 - TCY-55 - ns
(56)TAVRL ADR Valid to READ
LOW 17 - 17 - 17 - ns
(57)TAVWL ADR Valid to WRITE
LOW 7-7-7-ns
(58)TRHAL READ
HIGH to AEN LOW 15 - 15 - 15 - ns
(59)TRHSH READ
HIGH to ADSTB HIGH 13 - 13 - 13 - ns
(60)TWHSH WRITE
HIGH to ADSTB HIGH 15 - 15 - 15 - ns
(61)TDVRL DACK Valid to READ
LOW 25 - 25 - 25 - ns
(62)TDVWL DACK Valid to WRITE
LOW 25 - 25 - 25 - ns
AC Electrical Specifications V
CC
= +5.0V 10%, GND = 0V, T
A
= 0
o
C to +70
o
C (C82C37A),
T
A
= -40
o
C to +85
o
C (I82C37A),
T
A
= -55
o
C to +125
o
C (M82C37A) (Continued)
SYMBOL PARAMETER
82C37A-5 82C37A 82C37A-12
UNITSMIN MAX MIN MAX MIN MAX
82C37A
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26

IS82C37A-5

Mfr. #:
Buy IS82C37A-5
Manufacturer:
Renesas / Intersil
Description:
Interface - I/O Expanders DMA CONTROLLER IC -4 0+85C 5.0V 5.0MHZ DM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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