FEDS5412222B-02
Issue Date: Nov 01, 2012
MSM5412222B
262,214-Word 12-Bit Field Memory
1/16
GENERAL DESCRIPTION
The LAPIS Semiconductor MSM5412222B is a high performance 3-Mbit, 256K 12-bit, Field Memory. It is
especially designed for high-speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs,
digital movies and Multi-media systems. MSM5412222B is a FRAM for wide or low end use in general
commodity TVs and VTRs exclusively. MSM5412222B is not designed for the other use or high end use in
medical systems, professional graphics systems which require long term picture storage, data storage systems and
others. More than two MSM5412222Bs can be cascaded directly without any delay devices among the
MSM5412222Bs. (Cascading of MSM5412222B provides larger storage depth or a longer delay).
Each of the 12-bit planes has separate serial write and read ports. These employ independent control clocks to
support asynchronous read and write operations. Different clock rates are also supported that allow alternate data
rates between write and read data streams.
The MSM5412222B provides high speed FIFO, First-In First-Out, operation without external refreshing:
MSM5412222B refreshes its DRAM storage cells automatically, so that it appears fully static to the users.
Moreover, fully static type memory cells and decoders for serial access enable the refresh free serial access
operation, so that serial read and/or write control clock can be halted high or low for any duration as long as the
power is on. Internal conflicts of memory access and refreshing operations are prevented by special arbitration
logic.
The MSM5412222B’s function is simple, and similar to a digital delay device whose delay-bit-length is easily set
by reset timing. The delay length, number of read delay clocks between write and read, is determined by externally
controlled write and read reset timings.
Additional SRAM serial registers, or line buffers for the initial access of 256 12-bit enable high speed
first-bit-access with no clock delay just after the write or read reset timings.
Additionally, the MSM5412222B has write mask function or input enable function (IE), and read-data skipping
function or output enable function (OE) . The differences between write enable (WE) and input enable (IE), and
between read enable (RE) and output enable (OE) are that WE and RE can stop serial write/read address
increments, but IE and OE cannot stop the increment, when write/read clocking is continuously applied to
MSM5412222B. The input enable (IE) function allows the user to write into selected locations of the memory
only, leaving the rest of the memory contents unchanged. This facilitates data processing to display a “picture in
picture” on a TV screen.
The MSM5412222B is similar in operation and functionality to LAPIS Semiconductor 1-Mbit Field Memory
MSM514222C and 2-Mbit Field Memory MSM518222A. Three MSM514222Cs or one MSM514222C plus one
MSM518222A can be replaced simply by one MSM5412222B.
