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ADG3308BCPZ-REEL7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
ADG3308/ADG3308-1 Data Sheet
Rev. E | Page 10 of 20
0
1
2
3
4
5
6
7
8
9
10
13 18 23 28 33 38 43 48 53
RISE TIME (ns)
CAPACITIVE LOAD (pF)
T
A
= 25°C
1 CHANNEL
DATA RATE = 50kbps
V
CCA
= 1.2V, V
CCY
= 1.8V
V
CCA
= 1.8V, V
CCY
= 3.3V
V
CCA
= 3.3V, V
CCY
= 5V
0
4865-025
Figure 17. Rise Time vs. Capacitive Load at Pin A (Y→A Level Translation)
13 18 23 28 33 38 43 48 53
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
FALL TIME (ns)
CAPACITIVE LOAD (pF)
T
A
= 25°C
1 CHANNEL
DATA RATE = 50kbps
V
CCA
= 1.2V, V
CCY
= 1.8V
V
CCA
= 1.8V, V
CCY
= 3.3V
V
CCA
= 3.3V, V
CCY
= 5V
04865-026
Figure 18. Fall Time vs. Capacitive Load at Pin A (Y→A Level Translation)
0
2
4
6
8
10
12
14
13 23 33 43 53 63
73
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
T
A
= 25°C
1 CHANNEL
DATA RATE = 50kbps
V
CCA
= 1.2V, V
CCY
= 1.8V
V
CCA
= 1.8V, V
CCY
= 3.3V
V
CCA
= 3.3V, V
CCY
= 5V
0
4865-027
Figure 19. Propagation Delay (t
PLH
) vs. Capacitive Load
at Pin Y (A→Y Level Translation)
0
2
4
6
8
10
12
13 23 33 43 53 63 73
PROPAGATION DELAY (ns)
CAPACITIVE LOAD (pF)
T
A
= 25°C
1 CHANNEL
DATA RATE = 50kbps
V
CCA
= 1.2V, V
CCY
= 1.8V
V
CCA
= 1.8V, V
CCY
= 3.3V
V
CCA
= 3.3V, V
CCY
= 5V
04865-028
Figure 20. Propagation Delay (t
PHL
) vs. Capacitive Load
at Pin Y (A→Y Level Translation)
0
1
2
3
4
5
6
7
8
9
13 18 23 28 33 38 43 48 53
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
T
A
= 25°C
1 CHANNEL
DATA RATE = 50kbps
V
CCA
= 1.2V, V
CCY
= 1.8V
V
CCA
= 1.8V, V
CCY
= 3.3V
V
CCA
= 3.3V, V
CCY
= 5V
04865-029
Figure 21. Propagation Delay (t
PLH
) vs. Capacitive Load
at Pin A (Y→A Level Translation)
0
1
2
3
4
5
6
7
8
9
13 18 23 28 33 38 43 48 53
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
T
A
= 25°C
1 CHANNEL
DATA RATE = 50kbps
V
CCA
= 1.2V, V
CCY
= 1.8V
V
CCA
= 1.8V, V
CCY
= 3.3V
V
CCA
= 3.3V, V
CCY
= 5V
04865-030
Figure 22. Propagation Delay (t
PHL
) vs. Capacitive Load
at Pin A (Y→A Level Translation)
Data Sheet ADG3308/ADG3308-1
Rev. E | Page 11 of 20
T
A
= 25°C
DATA RATE = 25Mbps
C
L
= 50pF
1 CHANNEL
5ns/DIV
400mV/DIV
04865-037
Figure 23. Eye Diagram at Y Output
(1.2 V→1.8 V Level Translation, 25 Mbps)
5ns/DIV
200mV/DIV
T
A
= 25°C
DATA RATE = 25Mbps
C
L
= 50pF
1 CHANNEL
04865-038
Figure 24. Eye Diagram at A Output
(1.8 V→1.2 V Level Translation, 25 Mbps)
T
A
= 25°C
DATA RATE = 50Mbps
3ns/DIV
500mV/DIV
C
L
= 50pF
1 CHANNEL
04865-039
Figure 25. Eye Diagram at Y Output
(1.8 V→3.3 V Level Translation, 50 Mbps)
T
A
= 25°C
DATA RATE = 50Mbps
C
L
= 15pF
1 CHANNEL
3ns/DIV
400mV/DIV
04865-040
Figure 26. Eye Diagram at A Output
(3.3 V→1.8 V Level Translation, 50 Mbps)
T
A
= 25°C
DATA RATE = 50Mbps
C
L
= 50pF
1 CHANNEL
3ns/DIV
1V/DIV
04865-041
Figure 27. Eye Diagram at Y Output
(3.3 V→5 V Level Translation, 50 Mbps)
T
A
= 25°C
DATA RATE = 50Mbps
C
L
= 15pF
1 CHANNEL
3ns/DIV
800mV/DIV
04865-042
Figure 28. Eye Diagram at A Output
(5 V→3.3 V Level Translation, 50 Mbps)
ADG3308/ADG3308-1 Data Sheet
Rev. E | Page 12 of 20
TEST CIRCUITS
ADG3308/
ADG3308-1
Ax
Yx
GND
V
CCA
V
CCY
EN
K1
K2
I
OH
I
OL
0.1µF
0.1µF
04865-043
Figure 29. V
OH
/V
OL
Voltages at Pin A
ADG3308/
ADG3308-1
Yx
xA
GND
V
CCY
V
CCA
EN
K1
K2
I
OH
I
OL
0.1µF
0.1µF
04865-044
Figure 30. V
OH
/V
OL
Voltages at Pin Y
ADG3308/
ADG3308-1
Ax Yx
GND
V
CCA
V
CCY
K
0.1µF
0.1µF
A
EN
04865-045
Figure 31. Three-State Leakage Current at Pin A
ADG3308/
ADG3308-1
Ax
Yx
GND
V
CCA
V
CCY
K
0.1µF
0.1µF
EN
A
04865-046
Figure 32. Three-State Leakage Current at Pin Y
ADG3308/
ADG3308-1
Ax
Yx
GND
V
CCA
V
CCY
K
0.1µF
0.1µF
EN
A
04865-047
Figure 33. EN Pin Leakage Current
ADG3308/
ADG3308-1
Ax
Yx
GND
V
CCA
V
CCY
EN
CAPACITANCE
METER
04865-048
Figure 34. Capacitance at Pin A
ADG3308/
ADG3308-1
Ax
Yx
GND
V
CCA
V
CCY
EN
CAPACITANCE
METER
04865-049
Figure 35. Capacitance at Pin Y
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

ADG3308BCPZ-REEL7

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Buy ADG3308BCPZ-REEL7
Manufacturer:
Description:
Translation - Voltage Levels Low VTG 1.15V-5.5V 8-CH Bidirect Logic
Lifecycle:
New from this manufacturer.
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