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DS28EC20P+
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
DS28EC20:
20K
b 1
-
Wire EEPROM
13
of
27
Figu
re 7
-
2. Me
mor
y Fu
n
ction
Flow
c
hart
(
conti
nued
)
AAh
Read Scratch
-
Pad ?
DS28EC20 s
ets Sc
ratch
-
pad Off
set = (T
[4:0])
Bus Master
RX
TA1 (T
[7:0]), T
A2 (T[15:8])
and E/S B
yte
Bus Master
RX Dat
a Byte
from
Scratchpad Of
fset
Y
Bus Master
RX “1”s
Master
TX Reset ?
Y
N
Master
TX Reset ?
DS28EC20
Increm
ents
Scra
tc
hpad
Offs
et
Scrpad. Of
fset
= 11111b ?
Y
Y
N
N
N
From F
igure 7,
1
st
Part
To Figure 7,
1
st
Part
To Figure 7,
3
rd
Part
From F
igure 7,
3
rd
Part
See
note
in W
r
ite
Scratchpa
d flow chart
for addit
ional detai
ls.
Bus Master
RX CRC1
6 of
Comm
and, Address,
E/S
Byte, Data
Bytes as s
ent
by the DS2
8EC20
DS28EC20:
20K
b 1
-
Wire EEPROM
14
of
27
Figu
re
7-
3. M
em
ory
Func
tion
Flow
c
hart
(
conti
nued
)
From F
igure 7,
2
nd
Part
To Figure 7,
2
nd
P
art
To Figure 7,
4
th
Part
From F
igure 7,
4
th
Part
* 1
-
W
ire idle high f
or t
PROG
for po
wer
55h
Copy Scratc
h
-
Pad ?
Bus Master
TX
TA1 (T
[7:0]), T
A2 (T[15:8])
and E/S B
yte
Y
N
Bus Master
RX “1”s
Master
TX Reset ?
Y
N
Y
Auth. Code
Match ?
N
DS28EC20 c
opies
Scratch
-
pad Data to Address
AA = 1
*
D
S28EC20 T
X “0”
Master
TX Reset ?
Master
TX Reset ?
Y
N
DS28EC20 T
X “1”
N
Y
N
Copy
-
Protected ?
Y
Y
N
PF = 0?
Y
N
BS = 0?
DS28EC20: 20Kb 1-Wire EEPROM
15 of 27
Figure 7-4. Memory Functi
on Flowchart (continued)
F0h
Read Memor
y ?
Y
N
From Figure
7,
3
rd
Part
To
Figure
7,
3
rd
Part
A5h
Extend
ed R
ea
d
Memor
y?
N
Y
Bus Mast
er TX
TA1 (T[7:0]),
TA2 (T[15:8])
DS28EC
20 sets Mem
or
y
Address
= (T[1
5:0])
DS28
EC20
Incr
emen
ts
Addre
ss
Counte
r
Bus Mast
er
RX “1”s
Addre
ss
< 0A3F
h?
Y
N
N
Master
TX Reset?
Y
Master
TX Reset?
Bus Mast
er RX
Data By
te from
Memory A
ddress
Y
N
N
Bus Master
RX “1”s
Master
TX Reset ?
Y
DS28EC
20 sets Mem
or
y
Addres
s = (T[
15:0])
Bus Ma
ster TX
TA1
(
T[
7:0]),
TA2 (
T[15:
8])
Deci
sion
m
ade by
DS28EC
20
Decisi
on
ma
de
by
Master
Master RX Byte from
Memory A
ddress
Addre
ss
<0A40h
Master T
X
Reset?
DS28EC
20
Increm
e
nts
Addres
s
Counte
r
End of
Page?
Master T
X
Reset
N
Y
N
Y
CRC OK?
Y
N
Y
N
Master RX
FFh Byte
Master RX CR
C16 of
Comm
and, Add
ress, Da
ta
(1
st
Pass);
CRC16 of
Data
(Subseque
nt Passes)
BS = 1
BS = 1
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
DS28EC20P+
Mfr. #:
Buy DS28EC20P+
Manufacturer:
Maxim Integrated
Description:
EEPROM 20Kb 1-Wire EEPROM
Lifecycle:
New from this manufacturer.
Delivery:
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