DS28EC20: 20Kb 1-Wire EEPROM
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OVERVIEW
The block diagram in Figure 1 shows the relationships between the major control and memory sections of the
DS28EC20. The DS28EC20 has four main data components: 1) 64-bit registration number, 2) 32-byte scratchpad,
3) eighty 32-byte pages of EEPROM, and 4) special function registers. The hierarchical structure of the 1-Wire
protocol is shown in Figure 2. The bus master must first provide one of the seven ROM (network) function
commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM, 5) Resume, 6) Overdrive Skip ROM, or
7) Overdrive Match ROM. Upon completion of an Overdrive ROM command byte executed at standard speed, the
device enters Overdrive mode where all subsequent communication occurs at a higher speed. For operation at
overdrive speed, the DS28EC20 requires V
PUP
to be 5V ±5%. The protocol required for these ROM function
commands is described in Figure 9. After a ROM function command is successfully executed, the memory
functions become accessible and the master may provide any one of the five memory function commands. The
protocol for these commands is described in Figure 7. All data is read and written least significant bit first.
Figure 2. Hierarchical Structure for 1-Wire Protocol
DS28EC20 Command Level:
1-Wire ROM Function
Commands (see Figure 9)
DS28EC20-Specific
Memory Function
Commands (see Figure 7)
Available
Commands:
Data Field
Affected:
Read ROM
Match ROM
Search ROM
Skip ROM
Resume
Overdrive Skip*
Overdrive Match*
64-bit Reg. #, RC-Flag
64
-bit Reg. #, RC-Flag
64
-bit Reg. #, RC-Flag
RC
-Flag
RC
-Flag
RC
-Flag, OD-Flag
64
-bit Reg. #, RC-Flag, OD-Flag
Write Scratchpad
Read Scratchpad
Copy Scratchpad
Read Memory
Extended Read Mem.
32-byte Scratchpad, Flags
32
-byte Scratchpad
Data Memory, Regis
ter Page
Data Memory, Register Page
Data Memory, Register Page
* For operation at overdrive speed, the DS28EC20 requires V
PUP
to be 5V ±5%.
64-BIT ROM
Each DS28EC20 contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code. The
next 48 bits are a unique serial number. The last 8 bits are a cyclic redundancy check (CRC) of the first 56 bits.
See Figure 3 for details. The 1-Wire CRC is generated using a polynomial generator consisting of a shift register
and XOR gates as shown in Figure 4. The polynomial is X
8
+ X
5
+ X
4
+ 1. Additional information about the 1-Wire
CRC is available in Application Note 27: Understanding and Using Cyclic Redundancy Checks with Maxim i
Button
®
Products (www.maxim-ic.com/AN27
).
The shift register bits are initialized to 0. Then, starting with the least significant bit of the family code, one bit at a
time is shifted in. After the 8th bit of the family code has been entered, the serial number is entered. After the last
bit of the serial number has been entered, the shift register contains the CRC value. Shifting in the 8 bits of the
CRC returns the shift register to all 0s.
Figure 3. 64-Bit ROM
MSB
LSB
8-Bit
CRC Code
48-Bit Serial Number
8-Bit Family
Code (43h)
MSB LSB
MSB LSB
MSB LSB
iButton is a registered trademark of Maxim Integrated Products, Inc.
DS28EC20: 20Kb 1-Wire EEPROM
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Figure 4. 1-Wire CRC Generator
X
0
X
1
X
2
X
3
X
4
X
5
X
6
X
7
X
8
Polynomial = X
8
+ X
5
+ X
4
+ 1
1
st
STAGE
2
nd
STAGE
3
rd
STAGE
4
th
STAGE
6
th
STAGE
5
th
STAGE
7
th
STAGE
8
th
STAGE
INPUT DATA
MEMORY
Data memory and special function registers are located in a linear address space, as shown in Figure 5. The data
memory and the registers have unrestricted read access. The data memory consists of 80 pages of 32 bytes each.
Eight adjacent pages form one 2Kb block. Each block can be individually set to open (default), write protected, or
EPROM mode by setting the associated protection byte in the register page, which starts at address 0A00h.
Besides the 10 block protection control bytes (one for each 2Kb data memory block) the register page contains 20
bytes of user EEPROM plus a memory block lock byte and a register page lock byte. Starting at address 0A20h,
the DS28EC20 has a read-only memory page that stores a factory byte and a 2-byte field reserved for a factory-
administered service to program manufacturer identification. All other bytes of that page are reserved. The
manufacturer ID can be a customer-supplied identification code that assists the application software in identifying
the product the DS28EC20 is associated with. Contact the factory to set up and register a custom manufacturer ID.
In addition to the EEPROM, the device has a 32-byte volatile scratchpad. Writes to the EEPROM array are a two-
step process. First, data is written to the scratchpad, and then copied into the main array. The user can verify the
data in the scratchpad prior to copying.
The protection control registers, along with the Memory Block Lock byte, determine whether write protection,
EPROM mode, or copy protection is enabled for each of the 10 data memory blocks. A value of 55h sets write
protection for the associated memory block. A value of AAh sets EPROM mode. The Memory Block Lock byte, if
programmed to either 55h or AAh, sets copy protection for all write-protected data memory blocks. Blocks in
EPROM mode are not affected. Programming the Register Page Lock byte to either 55h or AAh copy protects the
entire register page. The protection control registers and the Lock bytes write protect themselves if set to 55h or
AAh. Any other setting leaves them open for unrestricted write access. See the Copy Protection section for
explanation of copy protect vs. write protect.
Write Protection: Write protection prevents data from being changed, but does not block the copy-scratchpad
function; this allows the memory to be reprogrammed with the same data. In EEPROM devices digital information
is stored as electrical charge (electrons) on floating gates. Quantum mechanical effects allow electrons to be
transported in large numbers to and from the floating gate for programming and erasing memory cells. Electrons
leave the floating gate at a temperature-dependent rate. The higher the temperature, the faster is the rate at which
electrons escape. This rate is expressed as Data Retention in the EC table. Reprogramming the memory returns
the charge to the original value for a full data retention time. This is particularly useful in applications where data
retention is a concern, e.g., at high temperatures.
Copy Protection: Copy protection blocks the execution of the copy-scratchpad function. This feature achieves a
higher level of security, and should only be used after all write-protected locations and their associated protection
control bytes are set to their final values. Copy protection does not prevent copying data from one device to
another.
DS28EC20: 20Kb 1-Wire EEPROM
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Figure 5. Memory Map
ADDRESS RANGE TYPE DESCRIPTION PROTECTION CODES (NOTES)
0000h to 00FFh R/(W)
Data Memory
Pages 0 to 7 (Block 0)
(Protection controlled by address 0A00h)
0100h to 01FFh R/(W)
Data Memory
Pages 8 to 15 (Block 1)
(Protection controlled by address 0A01h)
0200h to 02FFh R/(W)
Data Memory
Pages 16 to 23 (Block 2)
(Protection controlled by address 0A02h)
0300h to 03FFh R/(W)
Data Memory
Pages 24 to 31 (Block 3)
(Protection controlled by address 0A03h)
0400h to 04FFh R/(W)
Data Memory
Pages 32 to 39 (Block 4)
(Protection controlled by address 0A04h)
0500h to 05FFh R/(W)
Data Memory
Pages 40 to 47 (Block 5)
(Protection controlled by address 0A05h)
0600h to 06FFh R/(W)
Data Memory
Pages 48 to 55 (Block 6)
(Protection controlled by address 0A06h)
0700h to 07FFh R/(W)
Data Memory
Pages 56 to 63 (Block 7)
(Protection controlled by address 0A07h)
0800h to 08FFh R/(W)
Data Memory
Pages 64 to 71 (Block 8)
(Protection controlled by address 0A08h)
0900h to 09FFh R/(W)
Data Memory
Pages 72 to 79 (Block 9)
(Protection controlled by address 0A09h)
0A00h* to 0A09h* R/(W)
Protection Control
Blocks 0 to 9
55h: Write protected; AAh: EPROM mode.
Address 0A00h is associated with Block 0,
address 0A01h with Block 1, etc.
0A0Ah to 0A1Dh R/(W) User EEPROM (Protection controlled by address 0A1Fh)
0A1Eh* R/(W) Memory Block Lock (See text)
0A1Fh* R/(W) Register Page Lock (See text)
0A20h R Factory Byte
(55h no valid manufacturer ID, AAh
0A23h to 0A24h are a valid Manufacturer ID)
0A21h to 0A22h R Factory Trim Bytes (Unspecified value)
0A23h to 0A24h R Manufacturer ID Validity depends on factory byte
0A25h to 0A3Fh R Reserved (Unspecified value)
* Once programmed to AAh or 55h this address becomes read-only. All other codes can be stored but neither write-protect the address nor
activate any function.

DS28EC20P+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
EEPROM 20Kb 1-Wire EEPROM
Lifecycle:
New from this manufacturer.
Delivery:
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