25
LTC1735-1
APPLICATIO S I FOR ATIO
WUU
U
LTC1735-1. The V
OSENSE
line should not be routed
close to any other nodes with high slew rates.
3. Are the SENSE
+
and SENSE
–
leads routed together with
minimum PC trace spacing? The filter capacitor be-
tween SENSE
+
and SENSE
–
should be as close as
possible to the LTC1735-1. Ensure accurate current
sensing with kelvin connections to the SENSE resistors
shown in Figure 13. Series resistance can be added to
the SENSE lines to increase noise rejection.
4. Does the (+) terminal of C
IN
connect to the drain of the
topside MOSFET(s) as closely as possible? This capaci-
tor provides the AC current to the MOSFET(s).
5. Is the INTV
CC
decoupling capacitor connected closely
between
INTV
CC
and the power ground pin? This capaci-
tor carries the MOSFET driver peak currents. An addi-
tional 1µF ceramic placed immediately next to the INTV
CC
and PGND pins can help improve noise performance.
6. Keep the switching node (SW), Top Gate node (TG), and
Boost node (BOOST) away from sensitive small-signal
nodes, especially from the voltage and current sensing
feedback pins. All of these nodes have very large and
fast moving signals and therefore should be kept on the
“output side” (Pins 9 to 16) of the LTC1735-1 and
occupy minimum PC trace area.
Figure 13. Kelvin Sensing R
SENSE
Figure 12. LTC1735-1 Layout Diagram
+
C
OUT
R1
R2
C
B
D
B
R
SENSE
D1
Q2
+
4.7µF
Q1
+
C
IN
+
–
L1
V
IN
–
+
V
OUT
1735-1 F12
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C
OSC
RUN/SS
I
TH
PGOOD
SENSE
–
SENSE
+
V
OSENSE
SGND
TG
BOOST
SW
V
IN
INTV
CC
BG
PGND
EXTV
CC
LTC1735-1
47pF
1000pF
C
OSC
C
C
C
SS
INTV
CC
C
C2
R
C
SENSE
+
SENSE
–
HIGH CURRENT PATH
1735-1 F13
CURRENT SENSE
RESISTOR
(R
SENSE
)
