73S8023C Data Sheet DS_8023C_019
22 Rev. 1.5
Symbol Parameter Condition Min Typ Max Unit
Reset and Clock for card interface, RST, CLK
V Output level, high
OH
I
OH
0.9 V
= -200 µA
CC
V V
CC
V Output level, low
OL
I
OL
0
= 200 µA
0.2 V
V
Output voltage when outside
of a session
INACT
I
OL
= 0 0.1 V
I
OL
= 1 mA 0.3 V
I Output current limit, RST
RST_LIM
30 mA
I Output current limit, CLK
CLK_LIM
70 mA
t
R
, t Output rise time, fall time
F
C
L
= 35 pF for
CLK, 10% to 90%
8 ns
C
L
= 200 pF for
RST, 10% to 90%
100 ns
Td
Delay time STROBE to CLK,
RSTIN to RST
CLKSEL = 1, Cap.
load on CLK and
RST is minimal,
else rise, fall times
are a factor
20 ns
δ
Duty cycle for CLK
C
L
= 35 pF,
48% < δ
IN
45
< 52%
55 %
12.5 Digital Signals
Symbol Parameter Condition Min Typ Max Unit
Digital I/O Except for OSC I/O
V
IL
Input Low Voltage -0.3 0.8 V
V
IH
Input High Voltage 1.8 V
DD
+ 0.3 V
V
OL
Output Low Voltage I
OL
= 2 mA 0.45 V
V
OH
Output High Voltage I
OH
= -1 mA V
DD
- 0.45 V
R
OUT
Pull-up resistor, OFF
20
kΩ
t
SL
Time from CS going high to
interface active
50 ns
t
DZ
Time from CS going low to
interface inactive, Hi-Z
50 ns
t
IS
Set-up time, control signals
to CS rising edge
50 ns
t
SI
Hold time, control signals
from CS rising edge
50 ns
t
ID
Set-up time, control signals
to CS fall
50 ns
t
DI
Hold time, control signals
from CS fall
50 ns
|I
IL1
| Input Leakage Current GND < V
IN
< V
DD
-5 5 μA
