Memory and Memory Interfaces
4.4.3.1 On-Chip Memory
Up to 160 KB flash memory read/program/erase over full operating voltage and temperature
Up to 128 KB program flash array
FlexMemory for additional data/program space or up to 2 KB enhanced EEPROM
32 KB FlexNVM
2 KB FlexRAM (can be used as normal RAM if enhanced EEPROM is not used)
Separate block protection for standard flash array and FlexMemory (including data and EEPROM)
Up to 32 KB random access memory (RAM)
32-byte register file, powered in all modes
Security circuitry to prevent unauthorized access to RAM and flash contents
4.4.3.2 External Bus Interface (Mini-FlexBus)
Two independent, user-programmable chip-select signals that can gluelessly interface with external RAM, PROM,
EPROM, EEPROM, flash, and other peripherals
8-bit and 16-bit port sizes with configuration for multiplexed or nonmultiplexed address and data buses
Byte, word, and longword transfers
Programmable address-setup time with respect to the assertion of chip select
Programmable address-hold time with respect to the negation of chip select and transfer direction
4.4.4 Clocks
Frequency-locked loop (FLL)
Digitally controlled oscillator (DCO) with programmable frequency range
Option to program DCO frequency for a 32.768 kHz external reference clock source
Internal or external reference clock can be used to control the FLL
Phase-locked loop (PLL)
Voltage-controlled oscillator (VCO)
External reference clock is used as the PLL source
Modulo VCO frequency divider phase/frequency detector
Integrated loop filter
Internal reference clock (IRC) generator
32 kHz low range clock with 9 trim bits for accuracy
2 MHz fast clock with 3 trim bits
Low range clock can be used to control the FLL
Low range or fast clock can be selected as MCU's clock source
Can be used as a clock source for other on-chip peripherals
External clock (ERCLK) from the Crystal Oscillator (XOSC)
Can be used as the FLL and/or PLL source
Can be selected as the clock source for the MCU
External clock monitor with reset request capability
Lock detector with interrupt request capability for use with the PLL
Auto Trim Machine (ATM) for trimming both the low range and fast internal reference clocks
Reference dividers for both the FLL and PLL are provided
Clock source selected can be divided down by 1, 2, 4, 8, or 16
4.4.3
Memory and Memory Interfaces
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16 Freescale Semiconductor, Inc.
System Security and Integrity
4.4.5.1 Cryptographic Acceleration Unit (CAU)
Tightly coupled execution unit accessed with ColdFire coprocessor instructions
Hardware acceleration of the following cryptographic algorithms: DES, AES-128, AES-192, AES-256, MD5, SHA-1,
and SHA-256 (enables more complex algorithms such as 3DES with software encryption libraries that use these basic
hardware security blocks)
Simple, flexible programming model; very efficient ASM library is provided
ColdFire CAU Software Library: available at http://freescale.com
4.4.5.2 Random Number Generator (RNGB)
National Institute of Standards and Technology (NIST)-capable pseudo-random number generator (reference: http://
csrc.nist.gov )
Support for the key generation algorithm defined in the Digital Signature Standard (reference: http://www.itl.nist.gov/
fipspubs/fip186.htm )
Integrated entropy sources capable of providing the RNGB with entropy for its seed
4.4.5.3 Cyclic Redundancy Check (CRC)
Hardware CRC generator circuit using 16-bit or 32-bit (programmable) shift register
Programmable initial seed value and polynomial
Error detection for all single, double, and odd errors as well as most multibit errors
Optional feature to transpose input data and CRC result via transpose register (required for certain CRC standards)
Final XOR of the output (some CRCs have final XOR of their checksum with protocol-specified value)
4.4.5.4 COP Watchdog Module
Independent clock source input (independent from CPU/bus clock)
Choice between two clock sources:
LPO oscillator
Bus clock
Analog
4.4.6.1 16-bit Successive Approximation Analog-to-Digital Converter
(ADC)
Linear successive approximation algorithm with up to 16-bit resolution
Output modes:
Differential 16-bit, 13-bit, 11-bit, and 9-bit modes, in two's complement 16-bit sign-extended format
Single-ended 16-bit, 12-bit, 10-bit, and 8-bit modes, in right-justified unsigned format
Single or continuous conversion
Configurable sample time and conversion speed/power
Conversion complete and hardware average complete flag and interrupt
4.4.5
4.4.6
System Security and Integrity
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Input clock selectable from up to four sources
Operation in low power modes for lower noise operation
Asynchronous clock source for lower noise operation with option to output the clock
Selectable asynchronous hardware conversion trigger with hardware channel select
Automatic compare with interrupt for various programmable values
Temperature sensor
Hardware average function
Selectable voltage reference
Self-calibration mode
4.4.6.2 12-bit Successive Approximation Analog-to-Digital Converter
(ADC)
Linear successive approximation algorithm with up to 12-bit resolution
Single-ended 12-bit, 10-bit, and 8-bit modes, in right-justified unsigned format
Single or continuous conversion
Configurable sample time and conversion speed/power
Conversion complete and hardware average complete flag and interrupt
Input clock selectable from up to four sources
Operation in low power modes for lower noise operation
Asynchronous clock source for lower noise operation with option to output the clock
Selectable asynchronous hardware conversion trigger with hardware channel select
Automatic compare with interrupt for various programmable values
Temperature sensor
Hardware average function
Selectable voltage reference
Self-calibration mode
4.4.6.3 High-Speed Comparator (CMP)
Up to eight selectable comparator inputs; each input can be compared with any input by any polarity sequence
Selectable inversion on comparator output
Comparator output supports:
Sampled
Windowed (ideal for certain PWM zero-crossing-detection applications)
Digitally filtered using external sample signal or scaled peripheral clock
Selectable interrupt on rising edge, falling edge, or either rising or falling edges of comparator output
Two performance modes:
Shorter propagation delay at the expense of higher power
Low power, with longer propagation delay
Operational in all MCU power modes
4.4.6.3.1 6-bit Digital-to-Analog Converter (DAC)
Integrated on high-speed comparator
6-bit resolution
On-chip programmable reference generator output
Selectable supply reference source
Operational in all MCU power modes
Analog
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18 Freescale Semiconductor, Inc.

LPC54113J256UK49Z

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
ARM Microcontrollers - MCU LPC54113J256UK49/UNCASED///REEL 7 Q1 DP CHIPS
Lifecycle:
New from this manufacturer.
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