Products and specifications discussed herein are subject to change by Micron without notice.
128Mb, 256Mb NOR Flash and 128Mb, 512Mb LPDDR MCP
Features
PDF: 09005aef8492173b Micron Technology, Inc., reserves the right to change products or specifications without notice.
m39l0rx0x0x0U3.fm - Rev. D 9/13 EN
1 ©2011 Micron Technology, Inc. All rights reserved.
NOR Flash with Mobile LPDDR
133-Ball MCP
M39L0Rx0x0U3
Features
Multichip Package
• One die of 128Mb or 256Mb (MUX I/O, multiple
bank, multilevel interface, burst) Flash memory
• One die of 128Mb or 512Mb LPDDR
• Supply voltages:
– V
DDF
= V
DDQF
= 1.7–1.95V
– V
PPF
= 9V for fast program
– V
DDD
= V
DDQD
= 1.7–1.95V
• Electronic signature:
– Manufacturer code: 20h
– Top device codes:
M58LR128KC = 882Eh
M58LR256KC = 881Ch
– Bottom device codes:
M58LR128KD = 882Fh
M58LR256KD = 881Dh
• 133-ball VFBGA package
– RoHS-compliant
Flash Memory
• Multiplexed address/data
• Synchronous/asynchronous read
– Synchronous burst read mode: 66 MHz
– Random access: 70ns
• Synchronous burst read suspend
•Programming time
– 2.5µs typical word program time using buffer
enhanced factory program command
• Memory organization
– Multiple bank memory array: 16Mb banks
– Parameter blocks (top or bottom location)
•Dual operations
– Program/erase in one bank while read in others
– No delay between READ and WRITE operations
• Block locking
– All blocks locked at power-up
– Any combination of blocks can be locked with zero
latency
– WP
F
for block lock-down
– Absolute write protection with V
PPF
= V
SSF
•Security
– 64-bit unique device number
– 2112-bit user programmable OTP Cells
• CFI (common Flash interface)
• 100,000 PROGRAM/ERASE cycles per block
LPDDR
• Synchronous dynamic RAM
– 128Mb organized as 4 banks of 2 MWords, each 16
bits wide, 1K page
– 512Mb organized as 4 banks of 8 MWords, each 16
bits wide, 2K page
• DDR
– Two data transfers/clock cycle
– Clock rate: 128Mb = 133 MHz (MAX)
512Mb = 166 MHz (MAX)
• Synchronous burst read and write
•Automatic precharge
• Byte write controlled by LDQM
D
and UDQM
D
• Low-power features:
– Partial array self refresh (PASR)
– Automatic temperature-compensated self refresh
(ATCSR)
– Driver strength (DS)
