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X9410WS24ZT1

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
10
FN8193.2
October 12, 2006
ABSOLUTE MAXIMUM RATINGS
Temperature under bias .................... -65°C to +135°C
Storage temperature.......................... -65C to +150C
Voltage on SCK, SCL or any address
input with respect to V
SS
......................... -1V to +7V
Voltage on V+ (referenced to V
SS
) ........................10V
Voltage on V- (referenced to V
SS
).........................-10V
(V+) - (V-)...............................................................12V
Any V
H
.....................................................................V+
Any V
L
......................................................................V-
Lead temperature (soldering, 10s) .................. +300°C
I
W
(10s) ............................................................±12mA
COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only; functional operation of the
device (at these or any other conditions above those
listed in the operational sections of this specification) is
not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
ANALOG CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Notes: (1) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when
used as a potentiometer.
(2) Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a
potentiometer. It is a measure of the error in step size.
(3) MI = RTOT/63 or (R
H
- R
L
)/63, single pot
(4) Individual array resolution
Symbol Parameter
Limits
Test ConditionsMin. Typ. Max. Unit
R
TOTAL
End to end resistance ±20 %
Power rating 50 mW +25
°C, each pot
I
W
Wiper current ±6 mA
R
W
Wiper resistance 150 250 Wiper Current = 1mA,
V
CC
=3V
40 100 Wiper Current = 1mA,
V
CC
=5V
Vv+ Voltage on V+ Pin X9410 +4.5 +5.5 V
X9410-2.7 +2.7 +5.5
Vv- Voltage on V- Pin X9410 -5.5 -4.5 V
X9410-2.7 -5.5 -2.7
V
TERM
Voltage on any V
H
/R
H
or V
L
/R
L
Pin V- V+ V
Noise -120 dBV Ref: 1kHz
Resolution
(4)
1.6 %
Absolute linearity
(1)
±1 MI
(3)
R
w(n)(actual)
- R
w(n)(expected)
Relative linearity
(2)
±0.2 MI
(3)
R
w(n + 1)
- [R
w(n) + MI
]
Temperature coefficient of R
TOTAL
300 ppm/C
Ratiometric temp. coefficient ±20 ppm/°C
C
H
/C
L
/C
W
Potentiometer capacitances 10/10/25 pF See Circuit #3
RECOMMENDED OPERATING CONDITIONS
Temp Min. Max.
Commercial 0°C+70°C
Industrial -40
°C+85°C
Device Supply Voltage (V
CC
) Limits
X9410 5V 10%
X9410-2.7 2.7V to 5.5V
X9410
11
FN8193.2
October 12, 2006
D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.)
ENDURANCE AND DATA RETENTION
CAPACITANCE
POWER-UP TIMING
POWER-UP AND POWER-DOWN
There are no restrictions on the power-up or power-
down sequencing of the bias supplies V
CC
, V+, and V-
provided that all three supplies reach their final values
within 1msec of each other. However, at all times, the
voltages on the potentiometer pins must be less than
V+ and more than V-. The recall of the wiper position
from nonvolatile memory is not in effect until all
supplies reach their final value.
EQUIVALENT A.C. LOAD CIRCUIT
Symbol Parameter
Limits
Test ConditionsMin. Typ. Max. Units
I
CC1
V
CC
supply current (Active) 400 µA f
SCK
= 2MHz, SO = Open,
Other Inputs = V
SS
I
CC2
V
CC
supply current (Nonvolatile
Write)
1mAf
SCK
= 2MHz, SO = Open,
Other Inputs = V
SS
I
SB
V
CC
current (standby) 1 µA SCK = SI = V
SS
, Addr. = V
SS
I
LI
Input leakage current 10 µA V
IN
= V
SS
to V
CC
I
LO
Output leakage current 10 µA V
OUT
= V
SS
to V
CC
V
IH
Input HIGH voltage V
CC
x 0.7 V
CC
+ 0.5 V
V
IL
Input LOW voltage -0.5 V
CC
x 0.1 V
V
OL
Output LOW voltage 0.4 V I
OL
= 3mA
Parameter Min. Unit
Minimum endurance 100,000 Data changes per bit per register
Data retention 100 years
Symbol Test Max. Unit Test Conditions
C
OUT
(5)
Output capacitance (SO) 8 pF V
OUT
= 0V
C
IN
(5)
Input capacitance (A0, A1, SI, and SCK) 6 pF V
IN
= 0V
Symbol Parameter Min. Max. Unit
t
PUR
(6)
Power-up to initiation of read operation 1 1 ms
t
PUW
(6)
Power-up to initiation of write operation 5 5 ms
t
R
V
CC
V
CC
Power-up ramp 0.2 50 V/msec
5V
1533
100pF
SDA Output
2.7V
100pF
X9410
12
FN8193.2
October 12, 2006
A.C. TEST CONDITIONS
Notes: (5) This parameter is periodically sampled and not 100% tested
(6) t
PUR
and t
PUW
are the delays required from the time the
third (last) power supply (V
CC
, V+ or V-) is stable until
the specific instruction can be issued. These parameters
are periodically sampled and not 100% tested.
Test Circuit #3 SPICE Macro Model
AC TIMING
I
nput pulse levels V
CC
x 0.1 to V
CC
x 0.9
Input rise and fall times 10ns
Input and output timing level V
CC
x 0.5
Symbol Parameter Min. Max. Unit
f
SCK
SSI/SPI clock frequency 2.0 MHz
t
CYC
SSI/SPI clock cycle time 500 ns
t
WH
SSI/SPI clock high time 200 ns
t
WL
SSI/SPI clock low time 200 ns
t
LEAD
Lead time 250 ns
t
LAG
Lag time 250 ns
t
SU
SI, SCK, HOLD and CS input setup time 50 ns
t
H
SI, SCK, HOLD and CS input hold time 50 ns
t
RI
SI, SCK, HOLD and CS input rise time 2 µs
t
FI
SI, SCK, HOLD and CS input fall time 2 µs
t
DIS
SO output disable time 0 500 ns
t
V
SO output valid time 100 ns
t
HO
SO output hold time 0 ns
t
RO
SO output rise time 50 ns
t
FO
SO output fall time 50 ns
t
HOLD
HOLD time 400 ns
t
HSU
HOLD setup time 100 ns
t
HH
HOLD hold time 100 ns
t
HZ
HOLD low to output in High Z 100 ns
t
LZ
HOLD high to output in Low Z 100 ns
T
I
Noise suppression time constant at SI, SCK, HOLD and CS inputs 20 ns
t
CS
CS deselect time 2 µs
t
WPASU
WP, A0 and A1 setup time 0 ns
t
WPAH
WP, A0 and A1 hold time 0 ns
X9410
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

X9410WS24ZT1

Mfr. #:
Buy X9410WS24ZT1
Manufacturer:
Renesas / Intersil
Description:
Digital Potentiometer ICs DL XDCP 10KOHM 64 TAP SPI
Lifecycle:
New from this manufacturer.
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