7
FN8193.2
October 12, 2006
Figure 7. Increment/Decrement Instruction Sequence
Figure 8. Increment/Decrement Timing Limits
Table 1. Instruction Set
010100A1A0 I3 I2 I1 I0 0 0 P0
SCK
SI
I
N
C
1
I
N
C
2
I
N
C
n
D
E
C
1
D
E
C
n
0
CS
Instruction
Instruction Set
OperationI
3
I
2
I
1
I
0
R
1
R
0
P
1
P
0
Read Wiper Counter Register 1 0 01000P
0
Read the contents of the Wiper Counter
Register pointed to by P
0
Write Wiper Counter Register1010000P
0
Write new value to the Wiper Counter Register
pointed to by P
0
Read Data Register 1 0 1 1 R
1
R
0
0P
0
Read the contents of the Data Register pointed
to by P
0
and R
1
- R
0
Write Data Register 1 1 0 0 R
1
R
0
0P
0
Write new value to the Data Register pointed to
by P
0
and R
1
- R
0
XFR Data Register to Wiper
Counter Register
1101R
1
R
0
0P
0
Transfer the contents of the Data Register
pointed to by R
1
- R
0
to the Wiper Counter
Register pointed to by P
0
XFR Wiper Counter Register
to Data Register
1110R
1
R
0
0P
0
Transfer the contents of the Wiper Counter
Register pointed to by P
0
to the Register
pointed to by R
1
- R
0
Global XFR Data Register to
Wiper Counter Register
0001R
1
R
0
0 0 Transfer the contents of the Data Registers
pointed to by R
1
- R
0
of both pots to their
respective Wiper Counter Register
Global XFR Wiper Counter
Register to Data Register
1000R
1
R
0
0 0 Transfer the contents of all Wiper Counter
Registers to their respective data Registers
pointed to by R
1
- R
0
of both pots
Increment/Decrement Wiper
Counter Register
0010000P
0
Enable Increment/decrement of the Wiper
Counter Register pointed to by P
0
Read Status (WIP bit) 0 1 010001Read the status of the internal write cycle, by
checking the WIP bit.
SCK
SI
V
W
/R
W
INC/DEC CMD Issued
t
WRID
Voltage Out
X9410
8
FN8193.2
October 12, 2006
Instruction Format
Notes: (1) “A1 ~ A0”: stands for the device addresses sent by the master.
(2) WPx refers to wiper position data in the Counter Register
(2) “I”: stands for the increment operation, SI held HIGH during active SCK phase (high).
(3) “D”: stands for the decrement operation, SI held LOW during active SCK phase (high).
Read Wiper Counter Register (WCR)
Write Wiper Counter Register (WCR)
Read Data Register (DR)
Write Data Register(DR)
Transfer Data Register (DR) to Wiper Counter Register (WCR)
Transfer Wiper Counter Register (WCR) to Data Register (DR)
CS
Falling
Edge
device type
identifier
device
addresses
instruction
opcode
WCR
addresses
wiper position
(sent by X9410 on SO)
CS
Rising
Edge
010100
A
1
A
0
1001000
P
0
00
W
P
5
W
P
4
W
P
3
W
P
2
W
P
1
W
P
0
CS
Falling
Edge
device type
identifier
device
addresses
instruction
opcode
WCR
addresses
Data Byte
(sent by Host on SI)
CS
Rising
Edge
010100
A
1
A
0
1010000
P
0
00
W
P
5
W
P
4
W
P
3
W
P
2
W
P
1
W
P
0
CS
Falling
Edge
device type
identifier
device
addresses
instruction
opcode
DR and WCR
addresses
Data Byte
(sent by X9410 on SO)
CS
Rising
Edge
010100
A
1
A
0
1011
R
1
R
0
0
P
0
00
W
P
5
W
P
4
W
P
3
W
P
2
W
P
1
W
P
0
CS
Falling
Edge
device type
identifier
device
addresses
instruction
opcode
DR and WCR
addresses
Data Byte
(sent by host on SI)
CS
Rising
Edge
HIGH-VOLTAGE
WRITE CYCLE
010100
A
1
A
0
1100
R
1
R
0
0
P
0
00
W
P
5
W
P
4
W
P
3
W
P
2
W
P
1
W
P
0
CS
Falling
Edge
device type
identifier
device
addresses
instruction
opcode
DR and WCR
addresses
CS
Rising
Edge
010100
A
1
A
0
1101
R
1
R
0
0
P
0
CS
Falling
Edge
device type
identifier
device
addresses
instruction
opcode
DR and WCR
addresses
CS
Rising
Edge
HIGH-VOLTAGE
WRITE CYCLE
010100
D
A
1
D
A
0
1110
R
1
R
0
0
P
0
X9410
9
FN8193.2
October 12, 2006
Increment/Decrement Wiper Counter Register (WCR)
Global Transfer Data Register (DR) to Wiper Counter Register (WCR)
Global Transfer Wiper Counter Register (WCR) to Data Register (DR)
Read Status
CS
Falling
Edge
device type
identifier
device
addresses
instruction
opcode
WCR
addresses
increment/decrement
(sent by master on SDA)
CS
Rising
Edge
010100
A
1
A
0
0010XX0
P
0
I/
D
I/
D
....
I/
D
I/
D
CS
Falling
Edge
device type
identifier
device
addresses
instruction
opcode
DR
addresses
CS
Rising
Edge
010100
A
1
A
0
0001
R
1
R
0
00
CS
Falling
Edge
device type
identifier
device
addresses
instruction
opcode
DR
addresses
CS
Rising
Edge
HIGH-VOLTAGE
WRITE CYCLE
010100
A
1
A
0
1000
R
1
R
0
00
CS
Falling
Edge
device type
identifier
device
addresses
instruction
opcode
wiper
addresses
Data Byte
(sent by X9410 on SO)
CS
Rising
Edge
010100
A
1
A
0
010100010000000
W
I
P
X9410

X9410WS24ZT1

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Digital Potentiometer ICs DL XDCP 10KOHM 64 TAP SPI
Lifecycle:
New from this manufacturer.
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