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AD9956YCPZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P34
AD9956
Rev. A | Page 14 of 32
04806-0-021
CENTER 159.5MHz 100kHz/ SPAN 1MHz
REF LVL
0dBm
DELTA 1 [T1]
–78.13dB
–100.20040080kHz
RBW
VBW
SWT
RF ATT
UNIT
500kHz
500kHz
20s
20dB
dB
1 AP
A
–20
–40
0
–60
–30
–50
–10
–70
–80
–90
–100
1
1
Figure 10. AD9956 DAC Performance: 400 MSPS Clock,
160 MHz F
OUT
, 1 MHz Span
FREQUENCY (Hz)
L(f) (dBc/Hz)
0
–10
–20
–30
–40
–60
–50
–70
–80
–90
–100
–110
–130
–120
–140
–160
–150
–170
10 1k100 10k 100k 1M
04806-0-023
Figure 11. AD9956 DDS/DAC Residual Phase Noise
400 MHz Clock, 10 MHz Output
FREQUENCY (Hz)
L(f) (dBc/Hz)
0
–10
–20
–30
–40
–60
–50
–70
–80
–90
–100
–110
–130
–120
–140
–160
–150
–170
10 1k100 10k 100k 1M
04806-0-024
Figure 12. AD9956 DDS/DAC Residual Phase Noise
400 MHz Clock, 40 MHz Output
04806-0-022
START 0Hz 20MHz/ STOP 200MHz
REF LVL
0dBm
DELTA 1 [T1]
–56.33dB
–80.96192385MHz
RBW
VBW
SWT
RF ATT
UNIT
10kHz
10kHz
5s
20dB
dB
1 AP
A
–20
–40
0
–60
–30
–50
–10
–70
–80
–90
–100
1
1
Figure 13. AD9956 DAC Performance: 400 MSPS Clock,
160 MHz F
OUT
, 200 MHz Span
FREQUENCY (Hz)
L(f) (dBc/Hz)
0
–10
–20
–30
–40
–60
–50
–70
–80
–90
–100
–110
–130
–120
–140
–160
–150
–170
10 1k100 10k 100k 10M1M
04806-0-025
Figure 14. AD9956 DDS/DAC Residual Phase Noise
400 MHz Clock, 103 MHz Output
FREQUENCY (Hz)
L(f) (dBc/Hz)
0
–10
–20
–30
–40
–60
–50
–70
–80
–90
–100
–110
–130
–120
–140
–160
–150
–170
10 1k100 10k 100k 10M1M
04806-0-026
Figure 15. AD9956 DDS/DAC Residual Phase Noise
400 MHz Clock, 159 MHz Output
AD9956
Rev. A | Page 15 of 32
FREQUENCY (Hz)
L(f) (dBc/Hz)
0
–10
–20
–30
–40
–60
–50
–70
–80
–90
–100
–110
–130
–120
–140
–160
–150
–170
10 1k100 10k 100k 10M1M
04806-0-027
Figure 16. RF Divider and CML Driver Residual
Phase Noise (840 MHz In, 105 MHz Out)
FREQUENCY (Hz)
L(f) (dBc/Hz)
0
–10
–20
–30
–40
–60
–50
–70
–80
–90
–100
–110
–130
–120
–140
–160
–150
–170
10 1k100 10k 100k 10M1M
04806-0-028
Figure 17. RF Divider and CML Driver Residual
Phase Noise (1240 MHz In, 155 MHz Out)
FREQUENCY (Hz)
L(f) (dBc/Hz)
0
–10
–20
–30
–40
–60
–50
–70
–80
–90
–100
–110
–130
–120
–140
–160
–150
–170
10 1k100 10k 100k 10M1M
04806-0-029
Figure 18. RF Divider and CML Driver Residual
Phase Noise (1680 MHz In, 210 MHz Out)
FREQUENCY (Hz)
L(f) (dBc/Hz)
0
–10
–20
–30
–40
–60
–50
–70
–80
–90
–100
–110
–130
–120
–140
–160
–150
–170
10 1k100 10k 100k 100M10M1M
04806-0-030
Figure 19. RF Divider and CML Driver Residual
Phase Noise (2488 MHz In, 622 MHz Out)
FREQUENCY (Hz)
L(f) (dBc/Hz)
0
–10
–20
–30
–40
–60
–50
–70
–80
–90
–100
–110
–130
–120
–140
–160
–150
–180
–170
10 1k100 10k 100k 10M1M
04806-0-031
Figure 20. Total System Phase Noise for 105 MHz Converter Clock
FREQUENCY (Hz)
L(f) (dBc/Hz)
0
–10
–20
–30
–40
–60
–50
–70
–80
–90
–100
–110
–130
–120
–140
–160
–150
–180
–170
10 1k100 10k 100k 10M1M
04806-0-032
Figure 21. Total System Phase Noise for 622 MHz OC-12 Clock
AD9956
Rev. A | Page 16 of 32
TYPICAL APPLICATION CIRCUITS
DAC
PLLREF
PLLOSC
CP_OUT
DDS
÷N
÷M
÷R
LPF
VCO
CML
DRIVER
PHASE FREQUENCY
DETECTOR/CHARGE PUMP
25MHz
CRYSTAL
400MHz
CLOCK1
CLOCK1′
AD9956
04806-0-010
LPF
Figure 22. Dual-Clock Configuration
PLLREF
PLLOSC
CP_OUT
DDS
÷R
VCO
AD9956
04806-0-011
LPF
LPF
DAC
Figure 23. Fractional-Divider Loop
PLLREF
PLLOSC
CP_OUT
DDS
÷R
VCO
AD9956
04806-0-012
LPF
DAC
÷N
CML
DRIVER
2.5GHz
TONE
8-LEVEL FSK
(FC = 100MHz)
BPF
BPF
25MHz
CRYSTA
L
Figure 24. LO and Baseband Modulation Generation
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P34

AD9956YCPZ

Mfr. #:
Buy AD9956YCPZ
Manufacturer:
Analog Devices Inc.
Description:
Data Acquisition ADCs/DACs - Specialized 400 MSPS 14-Bit 1.8V CMOS
Lifecycle:
New from this manufacturer.
Delivery:
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