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IS61WV12816DBLL-10BLI

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
4
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D
06/21/2011
IS61WV12816DALL/DALS, IS61WV12816DBLL/DBLS,
IS64WV12816DBLL/DBLS
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
VDD = 2.4V-3.6V
Symbol Parameter Test Conditions Min. Max. Unit
VOH Output HIGH Voltage VDD = Min., IOH = –1.0 mA 1.8 — V
VOL Output LOW Voltage VDD = Min., IOL = 1.0 mA — 0.4 V
VIH Input HIGH Voltage 2.0 VDD + 0.3 V
VIL Input LOW Voltage
(1)
–0.3 0.8 V
ILI Input Leakage GND ≤ VIN ≤ VDD –1 1 µA
ILO Output Leakage GND ≤ VOUT ≤ VDD, Outputs Disabled –1 1 µA
Note:
1. V
IL (min.) = –0.3V DC; VIL (min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
VIH (max.) = VDD + 0.3V DC; VIH (max.) = VDD + 2.0V AC (pulse width < 10 ns). Not 100% tested.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
VDD = 3.3V + 5%
Symbol Parameter Test Conditions Min. Max. Unit
VOH Output HIGH Voltage VDD = Min., IOH = –4.0 mA 2.4 — V
VOL Output LOW Voltage VDD = Min., IOL = 8.0 mA — 0.4 V
VIH Input HIGH Voltage 2 VDD + 0.3 V
VIL Input LOW Voltage
(1)
–0.3 0.8 V
ILI Input Leakage GND ≤ VIN ≤ VDD –1 1 µA
ILO Output Leakage GND ≤ VOUT ≤ VDD, Outputs Disabled –1 1 µA
Note:
1. V
IL (min.) = –0.3V DC; VIL (min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
V
IH (max.) = VDD + 0.3V DC; VIH (max.) = VDD + 2.0V AC (pulse width < 10 ns). Not 100% tested.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
VDD = 1.65V-2.2V
Symbol Parameter Test Conditions VDD Min. Max. Unit
VOH Output HIGH Voltage IOH = -0.1 mA 1.65-2.2V 1.4 — V
VOL Output LOW Voltage IOL = 0.1 mA 1.65-2.2V — 0.2 V
VIH Input HIGH Voltage 1.65-2.2V 1.4 VDD + 0.2 V
VIL
(1)
Input LOW Voltage 1.65-2.2V –0.2 0.4 V
ILI Input Leakage GND ≤ VIN ≤ VDD –1 1 µA
ILO Output Leakage GND ≤ VOUT ≤ VDD, Outputs Disabled –1 1 µA
Note:
1. VIL (min.) = –0.3V DC; VIL (min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
V
IH (max.) = VDD + 0.3V DC; VIH (max.) = VDD + 2.0V AC (pulse width < 10 ns). Not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com
5
Rev. D
06/21/2011
1
2
3
4
5
6
7
8
9
10
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12
IS61WV12816DALL/DALS, IS61WV12816DBLL/DBLS,
IS64WV12816DBLL/DBLS
AC TEST LOADS
Figure 1.
R1
5 pF
Including
jig and
scope
R2
OUTPUT
VTM
Figure 2.
Z
O
= 50Ω
VDD/2
50Ω
OUTPUT
30 pF
Including
jig and
scope
AC TEST CONDITIONS
Parameter Unit Unit Unit
(2.4V-3.6V) (3.3V + 5%) (1.65V-2.2V)
Input Pulse Level 0.4V to VDD - 0.3V 0.4V to VDD - 0.3V 0.4V to VDD - 0.3V
Input Rise and Fall Times 1V/ ns 1V/ ns 1V/ ns
Input and Output Timing VDD /2 VDD + 0.05 0.9V
and Reference Level (VRef) 2
Output Load See Figures 1 and 2 See Figures 1 and 2 See Figures 1 and 2
R1 ( Ω ) 1909 317 13500
R2 ( Ω ) 1105 351 10800
VTM (V) 3.0V 3.3V 1.8V
6
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D
06/21/2011
IS61WV12816DALL/DALS, IS61WV12816DBLL/DBLS,
IS64WV12816DBLL/DBLS
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Parameter Value Unit
VTERM Terminal Voltage with Respect to GND –0.5 to VDD + 0.5 V
VDD VDD Relates to GND –0.3 to 4.0 V
TSTG Storage Temperature –65 to +150 °C
PT Power Dissipation 1.0 W
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage
to the device. This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
CAPACITANCE
(1,2)
Symbol Parameter Conditions Max. Unit
CIN Input Capacitance VIN = 0V 6 pF
CI/O Input/Output Capacitance VOUT = 0V 8 pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A = 25°C, f = 1 MHz, VDD = 3.3V.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

IS61WV12816DBLL-10BLI

Mfr. #:
Buy IS61WV12816DBLL-10BLI
Manufacturer:
ISSI
Description:
SRAM 2M (128Kx16) 10ns Async SRAM 3.3v
Lifecycle:
New from this manufacturer.
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