[AK8817VQ]
MS1113-E-00 2009/08
-13-
(5) I2C Bus Input/Output Timing < Ta = -40 ~ +105 °C >
(5-1) Timing 1
VSDAH: 0.8PVDD
VSDAL : 0.2PVDD
Parameter Symbol Min. Max. Unit
Bus Free Time tBUF 1.3 usec
Hold Time (Start Condition) tHD:STA 0.6 usec
Clock Pulse Low Time tLOW 1.3 usec
Input Signal Rise Time tR 300 nsec
Input Signal Fall Time tF 300 nsec
Setup Time(Start Condition) tSU:STA 0.6 usec
Setup Time(Stop Condition) tSU:STO 0.6 usec
The above I2C bus related timing is specified by the I2C Bus Specification, and it is not limited by the device
performance. For details, please refer to the I2C Bus Specification.
(5-2) Timing 2
SDA
tHD:DAT
tHIGH
tSU:DAT
SCL
VSDAH
VSDAL
VSDAH
VSDAL
VSDAH: 0.8PVDD
VSDAL : 0.2PVDD
Parameter Symbol Min. Max. Unit
Data Setup Time tSU:DAT 100 (note1) nsec
Data Hold Time tHD:DAT 0.0 0.9 (note2) usec
Clock Pulse High Time tHIGH 0.6 usec
note 1 : when to use I2C Bus Standard mode, tSU:DAT >- 250 ns must be met.
note 2 : when the AK8817VQ is used in such bus interface where tLOW is not extended ( at minimum specification of
tLOW ), this condition must be met.
tR
tLOW
SDA
tBUF
tHD:STA
tF
tR
tF
tSU:STO
tSU:STA
SCL
VSDAH
VSDAL
VSDAH
VSDAL
[AK8817VQ]
MS1113-E-00 2009/08
-14-
Device Control Interface
The AK8817VQ is controlled via I2C Bus Control Interface.
[ I2C SLAVE Address ]
2C Slave Address is 0x40
[ I2C Control Sequence ]
(1) Write Sequence
When the Slave Address of the AK8817VQ Write mode is received at the first byte, Sub Address at the second byte and
Data at the third and succeeding bytes are received.
There are 2 operations in Write Sequence - a sequence to write at every single byte, and a sequential write operation to
write multiple bytes successively.
(a) 1 Byte Write Sequence
S
Slave
Address
w A
Sub
Address
A
Data A Stp
8-bits 1bit 8-bits 1bit 8-bits 1bit
(b) Multiple Bytes ( m-bytes ) Write Sequence ( Sequential Write Operation )
S
Slave
Address
w A
Sub
Address
(n)
A
Data(n) A
Data(n+
1)
A
Data(n+m) A stp
8-bits 1bit 8-bits 1bit 8-bits 1bit 8-bits 1bit
….
8-bits 1bit
(2) Read Sequence
When the Slave Address of the AK8817VQ Read mode is received, Data at the second and succeeding bytes are
transmitted.
S
Slave
Address
w A
Sub
Address
(n)
A
rS
Slave
Address
RA
Data1
A
Data2
A
Data3
A
… Data n
Ā
stp
8-bits 1 8-bits 1 8-bits 1 8-bits 1 8-bits 1 8-bits 1 8-bits 1
Abbreviated terms listed above mean :
S, rS : Start Condition
A : Acknowledge ( SDA Low )
A- : Not Acknowledge ( SDA High )
stp : Stop Condition
R/W 1 : Read 0 : Write
: to be controlled by the Master Device. Micro-computer interface is output normally .
: to be controlled by the Slave Device. To be output by the AK8817VQ.
[AK8817VQ]
MS1113-E-00 2009/08
-15-
Video Encoder Functional Outline
(1) Reset
(1-1) Reset of Serial Interface part ( asynchronous reset )
Reset is made by setting RSTN pin to low.
(1-2) Reset of other than Serial Interface blocks
Reset is made by keeping RSTN pin low for a longer than 100 clock time, in normal operation.
(1-3) at Power-On-Reset ( including power-down release case )
Follow the power-on-reset sequence.
At the completion of each initialization, all internal registers are set to default values ( refer to Register Map ). Right after
the reset, Video output of the AK8817VQ is put into Hi-Z condition.
(2) Power-Down
It is possible to put the device into power-down mode by setting the AK8817VQ power-down pin to GND.
Transition to power-down mode should be followed by the power-down sequence. As for the recover from the
power-down mode, it should be followed by the power-down release sequence.
(3) Master Clock
A following clock should be input as a Master clock.
In Encoder Mode operation ( a synchronized clock with input data is required )
When ITU-R BT.601 data is input
( PIXRT-bit = 0 )
When Square Pixel data is input
( PIXRT-bit = 1 )
NTSC Encoder 27MHz 24.5454MHz
PAL Encoder 27MHz 29.50MHz
(4) Video Signal Interface
Video input signal ( data ) should be synchronized in either of the following methods :
* Slave mode operation where synchronization is made with HSYNC ( HDI ) / VSYNC ( VDI ).
* ITU-R BT. 656 I / F ( EAV decode ) (only 27MHz operation)
(5) Pixel Data
Input data to the AK8817VQ is YCbCr ( 4:2:2 ).
Data with Y : 16 ~ 235 and CbCr : 16 ~ 240 should be input.
(6) Video Signal Conversion
Video Re-Composition module converts the multiplexed data ( ITU-R BT.601 Level Y, Cb, Cr ) into interlaced
NTSC-M and PAL-B, D, G, H, I data. Video encoding setting is done by “Control 1 Register “.

AK8817VQ

Mfr. #:
Manufacturer:
Description:
IC VIDEO ENCODER 48LQFP
Lifecycle:
New from this manufacturer.
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