[AK8817VQ]
MS1113-E-00 2009/08
-19-
(14) Video Data Interface Timing
Data is captured by a clock which is fed on CLKIN pin.
The Video Encoder receives a clock from a controller ( refer to the following diagram ).
In Slave mode operation, Synchronization is made with HDI / VDI.
In ITU-R BT.656 mode operation, HDI / VDI are not required.
Controller
AK8817
CLKIN
(H D I)
(VD I)
D[7:0]
[AK8817VQ]
MS1113-E-00 2009/08
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(14-2) Video Interface mode
The AK8817VQ synchronizes with input signal by the following, 2 interface modes.
(a) Slave-mode interface where synchronization is made with externally-fed synchronization signals HDI / VDI
( HDI / VDI interface )
(b) ITU-R BT.656 Interface mode ( 656 interface )
interface mode setting is controlled by [REC656]-bit of Control 2 Register.
REC656-bit Operation
0 HDI / VDI Slave mode
1 ITU-R BT.656 Interface mode
(a-1) Timing signal ( HDI / VDI ) VS Data input relation
Horizontal Synchronization ( in-line Pixel Sync ) is made with HDI synchronization timing signal.
Vertical Synchronization ( in-line Frame Line Sync ) is made with VDI synchronization timing signal.
Recognition of Video Field ( Odd Field or Even Field ) is made by VDI input signal which is referenced with HDI.
In normal operation, the AK8817VQ checks changes of HDI and VDI at the clock edge ( CLK synchronization )
which becomes a data capture reference position.
At a pixel position where HDI is judged to become “ Low “, it is recognized as 0
H
(zero th position ).
Cb0 data position depends on input data rate ( ITU-R BT.601 or Square Pixel data ).
Cb0 Data
At ITU-R BT.601 Data input At Square Pixel data input
NTSC Encoder 244
th
data 236
th
data
PAL Encoder 264
th
data 310
th
data
Video Field is recognized by the VDI relation with HDI.
Field recognition is made as follows :
The AK8817VQ distinguishes at every Field if it is Odd Field ( 1
st
Field ) or not. Even Field Sync signal is not usually input.
1 ) Recognition timing of Odd Field is decided by those timing signal relations which are fed on HDI and VDI pins.
When the VDI falling pulse is input on VDI input pin during the time from
3 clocks prior to the falling edge of
HDI timing pulse which is fed on HDI input till
3 clocks prior to the rising edge of HDI timing pulse, the Line is
recognized to be Line 4.
HDI
Line4/Line1(NTSC/PAL) Line5/Line2(NTSC/PAL)
VDI
3CLK
3CLK
Line6/Line3(NTSC/PAL)
2 ) Whenever Horizontal / Vertical SYNC signal inputs are not fed as expected in the Video Specifications, in term of
timing and # of pulses ( kept at “ High “ level ), the AK8817VQ continues to self-run the operation which is based on the
Sync
signals, fed just before.
But it is recommended to feed Sync signals as specified every time in order to prevent erroneous operation.
3 ) VD pulse input at other than Odd Field synchronization is ignored ( Synchronization is made with Odd Field only ).
[AK8817VQ]
MS1113-E-00 2009/08
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(a-2) Horizontal Synchronization ( Pixel Data synchronization within a Line )
(a-2-1) at ITU-R BT. 601 data input case
(a-2-1-1) NTSC
CLKIN
(27.00MHz)
DTI[7:0]
Cb0 Y0 Cr0 Y1 Cb1 Cr359 Y719
HDI
720 x 2 Clock
Active Video Area
(0x80) (0x10)(0x80) (0x10) (0x80) (0x10)(0x10)
0
H
1715 0 244
245
246 247 248 1684 1683
244T
(0x10)
1713
(0x80)
1714
* ) when D [7:0], HDI and CLKIN are in same phase relation as a timing example above, the AK8817VQ takes input data
at
the falling edge of each CLKIN if CLKEDGE-bit = 1.(CLKINV = 1.)
* ) as an input data other than during active video period, Black level ( C / Y = 0x80 / 0x10 ) or other than 0x00 / 0xFF
codes in non Hi-Z state should be input.
(a-2-1-2) PAL
CLKIN
(27.00MHz)
DTI[7:0]
Cb0 Y0 Cr0 Y1 Cb1 Cr359 Y719
HDI
720 x 2 Clock
Active Video Area
(0x80) (0x10)(0x80) (0x10) (0x80) (0x10)(0x10)
H0
1727 0 264
265
266 267 268 1704 1703 1702
264T
(0x10)
1725
(0x80)
1726
*) when D [7:0], HDI and CLKIN are in same phase relation as a timing example above, the AK8817VQ takes input data at
the falling edge of each CLKIN if CLKEDGE-bit = 1. .( CLKINV = 1.)
* ) as an input data other than during active video period, Black level ( C / Y = 0x80 / 0x10 ) or other than 0x00 / 0xFF
codes in non Hi-Z state should be input.

AK8817VQ

Mfr. #:
Manufacturer:
Description:
IC VIDEO ENCODER 48LQFP
Lifecycle:
New from this manufacturer.
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