[AK8817VQ]
MS1113-E-00 2009/08
-4-
Pin Functional Description
Pin# Pin Name I/O Functional Outline
1 N.C. - For normal operation, left open.
2 N.C. - For normal operation, left open.
3 AVDD P Analog power supply pin.
4 IREF O
IREF output pin. Connect this pin to Analog ground via a 12k ohm resistor
( better than +/- 1% accuracy ).
5 VREF O
On-chip VREF output pin.
AVSS level is output on this pin at PDN = L.
Connect this pin to Analog Ground via a 0.1 uF or larger capacitor.
6 UD4 O Test output pin. For normal operation, left open.
7 UD3 O Test output pin. For normal operation, left open.
8 UD2 O Test output pin. For normal operation, left open.
9 UD1 O Test output pin. For normal operation, left open.
10 UD0 O Test output pin. For normal operation, left open.
11 N.C. - For normal operation, left open.
12 N.C. - For normal operation, left open.
13 N.C. - For normal operation, left open.
14 CLKINV I
Internal clock is inverted (internal operation timing edge is inverted.)
Connect to either DVDD or DGND.
15 CLKIN I
Clock input pin.
Input a clock which is synchronized with data.
When to input 601 data : 27 MHz.
When to input square pixel data : 24.5454 MHz ( NTSC )/ 29.50 MHz ( PAL )
16 DVSS G Digital ground pin (digital core ground).
17 DVDD P Digital power supply pin (digital core power supply).
18 D7 I
Data Video Signal input pin (MSB).
Hi-Z input is acceptable to this pin at PDN = L.
19 D6 I
Data Video Signal input pin.
Hi-Z input is acceptable to this pin at PDN = L.
20 D5 I
Data Video Signal input pin.
Hi-Z input is acceptable to this pin at PDN = L.
21 D4 I
Data Video Signal input pin.
Hi-Z input is acceptable to this pin at PDN = L.
22 D3 I
Data Video Signal input pin.
Hi-Z input is acceptable to this pin at PDN = L.
23 D2 I
Data Video Signal input pin.
Hi-Z input is acceptable to this pin at PDN = L.
24 N.C. - For normal operation, left open.
25 N.C. - For normal operation, left open.
26 N.C. - For normal operation, left open.
27 TEST I For normal operation, connect to ground.
28 D1 I
Data Video Signal input pin.
Hi-Z input is acceptable to this pin at PDN = L.
29 D0 I
Data Video Signal input pin (LSB).
Hi-Z input is acceptable to this pin at PDN = L.
30 PVDD P Power supply pin for chip pad.
