PTN3360D All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 29 June 2012 16 of 24
NXP Semiconductors
PTN3360D
HDMI/DVI level shifter supporting 3 Gbit/s operation
10.5 DDC characteristics
[1] V
CC1
is the pull-up voltage for DDC source.
[2] V
CC2
is the pull-up voltage for DDC sink.
Table 12. DDC characteristics
Symbol Parameter Conditions Min Typ Max Unit
Input and output SCL_SOURCE and SDA_SOURCE, V
CC1
= 3.0 V to 3.6 V
[1]
V
IH
HIGH-level input voltage 0.7V
CC1
-3.6 V
V
IL
LOW-level input voltage 0.5 - +0.3V
CC1
V
V
ILc
contention LOW-level input voltage 0.5 0.4 - V
I
LI
input leakage current V
I
=3.6V - - 10 A
I
IL
LOW-level input current V
I
=0.2V - - 10 A
V
OL
LOW-level output voltage I
OL
=100A or 6 mA 0.47 0.52 0.6 V
V
OL
V
ILc
difference between LOW-level output
and LOW-level input voltage
contention
guaranteed by design - - 70 mV
C
io
input/output capacitance V
I
=3V or 0V; V
DD
=3.3V - 6 7 pF
V
I
= 3 V or 0 V; V
DD
=0V - 6 7 pF
Input and output SDA_SINK and SCL_SINK, V
CC2
=4.5V to 5.5V
[2]
V
IH
HIGH-level input voltage 0.7V
CC2
-5.5 V
V
IL
LOW-level input voltage 0.5 - +1.5 V
I
LI
input leakage current V
I
=5.5V - - 10 A
I
IL
LOW-level input current V
I
=0.2V - - 10 A
V
OL
LOW-level output voltage I
OL
=6mA - 0.1 0.2 V
C
io
input/output capacitance V
I
=3V or 0V; V
DD
=3.3V - - 7 pF
V
I
= 3 V or 0 V; V
DD
=0V - 6 7 pF
I
trt(pu)
transient boosted pull-up current V
CC2
=4.5V;
slew rate = 1.25 V/s
-6-mA
PTN3360D All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 29 June 2012 17 of 24
NXP Semiconductors
PTN3360D
HDMI/DVI level shifter supporting 3 Gbit/s operation
11. Package outline
Fig 4. Package outline SOT619-1 (HVQFN48)
0.51
A
1
E
h
b
UNIT
ye
0.2
c
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
7.1
6.9
D
h
5.25
4.95
y
1
7.1
6.9
5.25
4.95
e
1
5.5
e
2
5.5
0.30
0.18
0.05
0.00
0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT619-1 MO-220 - - -- - -
0.5
0.3
L
0.1
v
0.05
w
0 2.5 5 mm
scale
SOT619-1
HVQFN48: plastic thermal enhanced very thin quad flat package; no leads;
48 terminals; body 7 x 7 x 0.85 mm
A
(1)
max.
A
A
1
c
detail X
y
y
1
C
e
L
E
h
D
h
e
e
1
b
13 24
48
37
36
25
12
1
X
D
E
C
B
A
e
2
01-08-08
02-10-18
terminal 1
index area
terminal 1
index area
1/2 e
1/2 e
AC
C
B
v
M
w
M
E
(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D
(1)
PTN3360D All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 29 June 2012 18 of 24
NXP Semiconductors
PTN3360D
HDMI/DVI level shifter supporting 3 Gbit/s operation
12. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
12.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
12.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
Through-hole components
Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
12.3 Wave soldering
Key characteristics in wave soldering are:
Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
Solder bath specifications, including temperature and impurities

PTN3360DBS,518

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Interface - Specialized High-speed level shifter
Lifecycle:
New from this manufacturer.
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