LTC3727A-1
13
3727a1fa
Figure 1 on the fi rst page is a basic LTC3727A-1 application
circuit. External component selection is driven by the load
requirement, and begins with the selection of R
SENSE
and
the inductor value. Next, the power MOSFETs and D1 are
selected. Finally, C
IN
and C
OUT
are selected. The circuit
shown in Figure 1 can be confi gured for operation up to an
input voltage of 28V (limited by the external MOSFETs).
R
SENSE
Selection For Output Current
R
SENSE
is chosen based on the required output current.
The LTC3727A-1 current comparator has a maximum
threshold of 135mV/R
SENSE
and an input common mode
range of SGND to 14V. The current comparator threshold
sets the peak of the inductor current, yielding a maximum
average output current I
MAX
equal to the peak value less
half the peak-to-peak ripple current, ΔI
L
.
Allowing a margin for variations in the LTC3727A-1 and
external component values yields:
R
mV
I
SENSE
MAX
=
90
When using the controller in very low dropout conditions,
the maximum output current level will be reduced due
to the internal compensation required to meet stability
criterion for buck regulators operating at greater than 50%
duty factor. A curve is provided to estimate this reducton
in peak output current level depending upon the operating
duty factor.
Operating Frequency
The LTC3727A-1 uses a constant frequency phase-lockable
architecture with the frequency determined by an internal
capacitor. This capacitor is charged by a fi xed current
plus an additional current which is proportional to the
voltage applied to the PLLFLTR pin. Refer to Phase-Locked
Loop and Frequency Synchronization in the Applications
Information section for additional information.
A graph for the voltage applied to the PLLFLTR pin vs
frequency is given in Figure 5. As the operating frequency
APPLICATIONS INFORMATION
Figure 5. PLLFLTR Pin Voltage vs Frequency
OPERATING FREQUENCY (kHz)
200 250 300 350 550400 450 500
PLLFLTR PIN VOLTAGE (V)
3727 F05
2.5
2.0
1.5
1.0
0.5
0
is increased the gate charge losses will be higher, reducing
effi ciency (see Effi ciency Considerations). The maximum
switching frequency is approximately 550kHz.
Inductor Value Calculation
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is effi ciency. A higher
frequency generally results in lower effi ciency because
of MOSFET gate charge losses. In addition to this basic
trade-off, the effect of inductor value on ripple current and
low current operation must also be considered.
The inductor value has a direct effect on ripple current.
The inductor ripple current ΔI
L
decreases with higher
inductance or frequency and increases with higher V
IN
:
ΔI
fL
V
V
V
L OUT
OUT
IN
=
1
1
()( )
Accepting larger values of ΔI
L
allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ΔI
L
= 0.3(I
MAX
). The maximum
ΔI
L
occurs at the maximum input voltage.
LTC3727A-1
14
3727a1fa
The inductor value also has secondary effects. The tran-
sition to Burst Mode operation begins when the average
inductor current required results in a peak current below
25% of the current limit determined by R
SENSE
. Lower
inductor values (higher ΔI
L
) will cause this to occur at
lower load currents, which can cause a dip in effi ciency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease.
Inductor Core Selection
Once the inductance value is determined, the type of
inductor must be selected. Actual core loss is independent
of core size for a fi xed inductor value, but it is very dependent
on inductance selected. As inductance increases, core
losses go down. Unfortunately, increased inductance
requires more turns of wire and therefore copper (I
2
R)
losses will increase.
Ferrite designs have very low core loss and are preferred at
high switching frequencies, so designers can concentrate
on reducing I
2
R loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs size requirements and any
radiated fi eld/EMI requirements. New designs for high cur-
rent surface mount inductors are available from numerous
manufacturers, including Coiltronics, Vishay, TDK, Pulse,
Panasonic, Wuerth, Coilcraft, Toko and Sumida.
Power MOSFET and D1 Selection
Two external power MOSFETs must be selected for each
controller in the LTC3727A-1: One N-channel MOSFET for
the top (main) switch, and one N-channel MOSFET for the
bottom (synchronous) switch.
APPLICATIONS INFORMATION
The peak-to-peak drive levels are set by the INTV
CC
voltage. This voltage is typically 7.5V during start-up
(see EXTV
CC
Pin Connection). Consequently, logic-level
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected
(V
IN
< 5V); then, sub-logic level threshold MOSFETs
(V
GS(TH)
< 3V) should be used. Pay close attention to the
BV
DSS
specifi cation for the MOSFETs as well; most of the
logic level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R
DS(ON)
, reverse transfer capacitance C
RSS
,
input voltage and maximum output current. When the
LTC3727A-1 is operating in continuous mode the duty
cycles for the top and bottom MOSFETs are given by:
Main Switch Duty Cycle
V
V
Synchronous Switc
OUT
IN
=
hh Duty Cycle
VV
V
IN OUT
IN
=
The MOSFET power dissipations at maximum output
current are given by:
P
V
V
IR
kV I
MAIN
OUT
IN
MAX DS ON
IN MA
=
()
+
()
+
()
2
2
1 δ
()
XXRSS
SYNC
IN OUT
IN
MAX
Cf
P
VV
V
IR
()
()
()
=
()
+
()
2
1 δ
DDS ON()
where δ is the temperature dependency of R
DS(ON)
and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I
2
R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
IN
< 20V
the high current effi ciency generally improves with larger
MOSFETs, while for V
IN
> 20V the transition losses rapidly
increase to the point that the use of a higher R
DS(ON)
device
with lower C
RSS
actually provides higher effi ciency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
LTC3727A-1
15
3727a1fa
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs Temperature curve,
but δ = 0.005/°C can be used as an approximation for
low voltage MOSFETs. C
RSS
is usually specifi ed in the
MOSFET characteristics. The constant k = 1.7 can be used
to estimate the contributions of the two terms in the main
switch dissipation equation.
The Schottky diode D1 shown in Figure 2 conducts dur-
ing the dead-time between the conduction of the two
power MOSFETs. This prevents the body diode of the
bottom MOSFET from turning on, storing charge during
the dead-time and requiring a reverse recovery period
that could cost as much as 3% in effi ciency at high V
IN
.
A 1A to 3A Schottky is generally a good compromise for
both regions of operation due to the relatively small aver-
age current. Larger diodes result in additional transition
losses due to their larger junction capacitance. Schottky
diodes should be placed in parallel with the synchronous
MOSFETs when operating in pulse-skip mode or in Burst
Mode operation.
C
IN
and C
OUT
Selection
The selection of C
IN
is simplifi ed by the multiphase ar-
chitecture and its impact on the worst-case RMS current
drawn through the input network (battery/fuse/capacitor).
It can be shown that the worst case RMS current occurs
when only one controller is operating. The controller with
the highest (V
OUT
)(I
OUT
) product needs to be used in the
formula below to determine the maximum RMS current
requirement. Increasing the output current, drawn from
the other out-of-phase controller, will actually decrease the
input RMS ripple current from this maximum value (see
Figure 4). The out-of-phase technique typically reduces
the input capacitors RMS ripple current by a factor of
30% to 70% when compared to a single phase power
supply solution.
The type of input capacitor, value and ESR rating have
effi ciency effects that need to be considered in the selec-
tion process. The capacitance value chosen should be
suffi cient to store adequate charge to keep high peak
battery currents down. 22μF to 47μF is usually suffi cient
for a 25W output supply operating at 250kHz. The ESR of
the capacitor is important for capacitor power dissipation
APPLICATIONS INFORMATION
as well as overall battery effi ciency. All of the power (RMS
ripple current • ESR) not only heats up the capacitor but
wastes power from the battery.
Medium voltage (20V to 35V) ceramic, tantalum, OS-CON
and switcher-rated electrolytic capacitors can be used
as input capacitors, but each has drawbacks: ceramic
voltage coeffi cients are very high and may have audible
piezoelectric effects; tantalums need to be surge-rated;
OS-CONs suffer from higher inductance, larger case size
and limited surface-mount applicability; electrolytics’
higher ESR and dryout possibility require several to be
used. Multiphase systems allow the lowest amount of
capacitance overall. As little as one 22μF or two to three
10μF ceramic capacitors are an ideal choice in a 20W to
35W power supply due to their extremely low ESR. Even
though the capacitance at 20V is substantially below their
rating at zero-bias, very low ESR loss makes ceramics
an ideal candidate for highest effi ciency battery operated
systems. Also consider parallel ceramic and high quality
electrolytic capacitors as an effective means of achieving
ESR and bulk capacitance goals.
In continuous mode, the source current of the top N-chan-
nel MOSFET is a square wave of duty cycle V
OUT
/V
IN
. To
prevent large voltage transients, a low ESR input capaci-
tor sized for the maximum RMS current of one channel
must be used. The maximum RMS capacitor current is
given by:
C quiredI I
VVV
V
IN RMS MAX
OUT IN OUT
I
Re
/
()
12
NN
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
OUT
/2. This simple worst case condition is
commonly used for design because even signifi cant
deviations do not offer much relief. Note that capacitor
manufacturers ripple current ratings are often based on
only 2000 hours of life. This makes it advisable to further
derate the capacitor, or to choose a capacitor rated at a
higher temperature than required. Several capacitors may
also be paralleled to meet size or height requirements in
the design. Always consult the manufacturer if there is
any question.

LTC3727AIG-1#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Dual, 2-Phase Synchronous Controller w/ up to 14V Output
Lifecycle:
New from this manufacturer.
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