LTM9002
19
9002f
OPERATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
C2 C1 C0 A3 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0C3
CS/LD
SCK
SDI
COMMAND WORD ADDRESS WORD DATA WORD
24-BIT INPUT WORD
9002 F02
1
2
3
4
5
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7
8
9
10
11
12
13
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24 25 26 27 28 29 30 31 32
C2 C1 C0 A3 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0C3XXXXXXXX
CS/LD
SCK
SDI
COMMAND WORD ADDRESS WORD DATA WORD
DON’T CARE
9002 F03
Figure 2. Auxiliary DAC 24-Bit Load Sequence (Minimum Input Word)
Figure 3. Auxiliary DAC 32-Bit Load Sequence
LTM9002
20
9002f
Figure 4. Input Termination for Differential 50Ω
Input Impedance Using Shunt Resistor
Figure 5. Input Termination for Differential 50Ω
Input Impedance Using a Balun
APPLICATIONS INFORMATION
INPUT SPAN
The LTM9002 is confi gured with a given input span and
input impedance. With the amplifi er gain and the ADC
input network described above for LTM9002-AA, the
full-scale input range of the driver circuit is 0.1V
P-P
. The
recommended ADC input span is achieved by tying the
SENSE pin to V
DD
. However, the ADC input span can be
changed if required for the application. The resulting input
span at the IN
+
/IN
pins is the ADC input span divided by
the gain.
The LTM9002 is intended to be driven through the IN
+
and
IN
pins. The DNC pins are used for test purposes and are
not intended to be used in the application. These are test
points within the ADC input fi lter network. However, care
should be taken with these pins as they connect directly
to the internal signal path. They should be soldered to an
unconnected pad and should be well isolated.
Input Impedance and Matching
The input impedance of the amplifi er is 50Ω, 200Ω or
400Ω depending on the gain of the amplifi er. In some
applications the differential inputs may need to be ter-
minated to a lower value impedance, e.g. 50Ω, in order
to provide an impedance match for the source. Several
choices are available.
One approach is to use a differential shunt resistor
(Figure 4). Another approach is to employ a wide band
transformer and shunt resistor (Figure 5). Both methods
provide a wide band match. The termination resistor or
the transformer must be placed close to the input pins in
order to minimize the refl ection due to input mismatch.
Alternatively, one could apply a narrowband impedance
match at the inputs for frequency selection and/or noise
reduction.
Referring to Figure 6, amplifi er inputs can be easily con-
gured for single-ended input without a balun. The signal
is fed to one of the inputs through a matching network
while the other input is connected to the same matching
network and a source resistor. Because the return ratios
of the two feedback paths are equal, the two outputs have
the same gain and thus symmetrical swing. In general,
the single-ended input impedance and termination resis-
tor R
T
are determined by the combination of R
S
, R
G
and
R
F
, see Table 5.
Table 4. Differential Amplifi er Input Termination Values
GAIN (dB) Z
IN
/2 R
T
FIGURE 4 R
T
FIGURE 5
8 200Ω 57Ω 400Ω
14 100Ω 66.5Ω None
20 100Ω 66.5Ω None
26 25Ω None None
9002 F04
Z
IN
/2
R
T
500Ω
LTM9002
Z
IN
/2
25Ω
25Ω
V
IN
500Ω
IN
+
IN
+
9002 F05
Z
IN
/2
500Ω
LTM9002
Z
IN
/2
25Ω
25Ω
V
IN
500Ω
+
1:4
IN
+
IN
R
T
Table 5. Single-Ended Amplifi er Input Termination Values
GAIN (dB) Z
IN
/2 R
T
FIGURE 6
8 200Ω 59Ω
14 100Ω 68.5Ω
20 100Ω 66.5Ω
26 25Ω 150Ω
LTM9002
21
9002f
APPLICATIONS INFORMATION
Figure 6. Input Termination for Differential
50Ω Input Impedance Using Shunt Resistor
Figure 7. Calculate Differential Gain
The amplifi er is unconditionally stable, i.e. differential
stability factor Kf > 1 and stability measure B1 > 0. How-
ever, the overall differential gain is affected by the source
impedance in Figure 7:
AV = | V
OUT
/V
IN
| = (500/(R
S
+ Z
IN
/2)
The noise performance of the amplifi er also depends
upon the source impedance and termination. For example,
an input 1:4 transformer in Figure 5 improves the input
noise fi gure by adding 6dB gain at the inputs. A trade-off
between gain and noise is obvious when constant noise
gure circle and constant gain circle are plotted within
the input Smith Chart, based on which users can choose
the optimal source impedance for a given gain and noise
requirement.
SENSE Pin Operation
The internal voltage reference can be confi gured for two
pin-selectable input ranges of 0.1V (±50mV differential)
or 0.5V (±25mV differential) for LTM9002-AA. Tying the
SENSE pin to V
DD
selects the higher range; tying the SENSE
pin to 1.5V selects the lower range. For other versions of
LTM9002, the input span is either 2V
P-P
divided by the
gain or 1V
P-P
divided by the gain.
An external reference can be used by applying its output
directly or through a resistive divider to SENSE. It is not
recommended to drive the SENSE pin with a logic device.
The SENSE pin should be tied to the appropriate level as
close to the converter as possible. The SENSE pin is inter-
nally bypassed to ground with a 1μF ceramic capacitor.
Input Range
The input range can be set based on the application. The
0.1V input range (LTM9002-AA) will provide the best SNR
performance while maintaining excellent SFDR. The lower
input range will have slightly better SFDR performance, but
the SNR will degrade by 5dB. See the Typical Performance
Characteristics section.
Adjusting the Full-Scale Input Range
To trim the full-scale range of one channel to match that
of the other channel, fi rst set the desired range for both
channels by applying an external reference to SENSEA
and SENSEB as shown in Figure 8. Set the DAC codes to
approximately match the external reference voltage. Ap-
ply a full-scale voltage to the input of each channel. Read
the output of both channels and adjust the setting for the
DAC of one channel until the desired channel matching
has been achieved.
The adjustment range and step size depends on the resistor
values chosen for or the source resistance of the external
reference circuit. The external reference is connected to
the SENSE pin which has 10k (±1%) series impedance
with the internal DAC voltage. For the circuit shown in Fig-
ure 8, the step size is 76μV and the code representing 1V
is 0xAAB (0.666748 decimal). In this example, the SENSE
voltage trim range is from approximately 0.79V to 1.1V
including offset and gain errors. Therefore, the effective
input span can be trimmed from ±39.6mV to 55.2mV with
a step size of 3.8μV. However, it is not recommended to
9002 F06
Z
IN
/2
0.1μF
0.1μF
500Ω
LTM9002
Z
IN
/2
R
S
50Ω
R
S
50Ω
V
IN
500Ω
+
0.1μF
R
T
R
T
IN
+
IN
9002 F07
Z
IN
/2
R
T
500Ω
LTM9002
Z
IN
/2
R
S
/2
R
S
/2
V
IN
500Ω
IN
+
IN
+

LTM9002IV-LA#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 12-bit, Dual IF/Baseband Receiver Module, 65Msps, DC-25MHz LPF, 8dB/20dB gain, no trim DAC
Lifecycle:
New from this manufacturer.
Delivery:
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